12
3. MSP4440G
Main pins instruction:
2, 3: SCL, SDA
27, 28: left-right audio of audio power amplification
24, 25: left-right audio of earphone
36, 37: left-right audio of AV OUT
67: SIF input of TV
4. THC63LVDM83R
The THC63LVDM83R transmitter converts 28bits of CMOS/TTL data into LVDS (Low Voltage
Differential Signaling) data stream. A phase-locked transmit clock is transmitted in parallel with the
data streams over a fifth LVDS link. At a transmit clock frequency of 85MHz, 28bits of RGB data and
4bits of LCD timing and control data (HSYNC, VSYNC, CNTL1, CNTL2) are transmitted at a rate of
595Mbps per LVDS channel.
Also available is THC63LVDM63R that converts 21bits of CMOS/TTL data into LVDS (Low Voltage
Differential Signaling) data stream. Both transmitters can be programmed reduced swing LVDS
through a dedicated pin for low power consumption and EMI.
Summary of Contents for LC-32FC18
Page 1: ...LCD TELEVISION LC 32FC18 America ...
Page 16: ...14 Block diagram of TPA3008D2 ...
Page 17: ...15 Pin description ...
Page 29: ...CPU board ...
Page 30: ...CPU board ...
Page 31: ...CPU board ...
Page 32: ...CPU board ...
Page 33: ...CPU board ...
Page 34: ...CPU board ...
Page 35: ...CPU board ...
Page 36: ...CPU board ...
Page 37: ...CPU board ...
Page 38: ...CPU board ...
Page 39: ...AV trans connect board ...
Page 40: ...analog board ...
Page 41: ...32 power board 667 L32T18 20 ...
Page 43: ...APPENDIX Exploded view LC 32X18 ...
Page 45: ...603 L32FC18 14 Ver 1 1 ...