XTAG-2 Hardware Manual (1.0)
4
XSYS Connector
The XTAG-2 includes an XSYS 20-way IDC header, which can be used to connect it to
an XMOS development board for debugging programs on the hardware.
The XSYS connector provides pins for JTAG control, system reset, processor debug, a
duplex UART link and a 2-bit serial XMOS Link.
Pin
Signal
Direction
Description
1
5V
Target to Host
Power
2
NC
N/A
No connection
3
TRST_N
Host to Target
JTAG Test Reset - Active Low
4
GND
N/A
Ground
5
TDSRC
Host to Target
JTAG Test Data
6
XL1_UP1
Target to Host
XMOS Link
7
TMS
Host to Target
JTAG Test Mode Select
8
GND
N/A
Ground
9
TCK
Host to Target
JTAG Test Clock
10
XL1_UP0
Target to Host
XMOS Link
11
DEBUG
Bidirectional
Debug
12
GND
N/A
Ground
13
TDSNK
Target to Host
JTAG Test Data
14
XL1_DN0
Host to Target
XMOS Link
15
RST_N
Host to Target
System Reset - Active Low.
16
GND
N/A
Ground
17
UART_RX
Host to Target
Serial Port
18
XL1_DN1
Host to Target
XMOS Link
19
UART_TX
Target to Host
Serial Port
20
GND
N/A
Ground
The routing of these I/O pins along with the power pins is shown on the following
page.
www.xmos.com
