xiQ - Technical Manual Version 1.35
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3.9.3.3.
Digital Input – 24V logic
Digital Input 24V – signal levels
Depending on the camera's hardware version two different input signal levels are supported.
Input levels according IEC 61131-2, Type 1
V-in-min [V]
V-in-max [V]
State
I-max [mA]
-3
5
Off (0)
0.004
5
15
Transient
4
15
24
On (1)
12
table 3-29, digital info, signal levels, 24V logic
Note:
•
Input level Vin represents amplitude of the input signal.
•
Voltage levels referenced to common ground GND
Digital Input 24V – Internal Schematic
Following scheme is internal scheme of Digital Input signal flow inside the camera.
figure 3-38, digital input, interface schematic, 24V logic
Digital Input 24V – Timing
Typical measured input delay between Digital Input to FPGA Input
Measurements of input delays:
Edge Type
Input Voltage [V]
Typ. delay [μs]
Rising
15
1.4
Rising
20
0.6
Falling
15
5.3
Falling
20
7.8
table 3-30, digital input, timing, 24V logic
Note:
•
Measured at: Ambient Temperature 25°C
2K
5V6
GND
VCC
1K
FPGA_INPUT
DIGITAL INPUT
GND (Common IO Ground)
I
INPUT
