Xilinx Virtex-4 ML455, User Manual

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Virtex-4 ML455 PCI/PCI-X Board www.xilinx.com 5
UG084 (v1.0) May 17, 2005
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Chapter 1
Introduction
About the Virtex-4 ML455 PCI/PCI-X Development Kit
This kit provides a development platform for designing and verifying Virtex™-4 FPGA
based PCI and PCI-X applications utilizing Xilinx PCI LogiCORE™ intellectual property
(IP) cores in a 3.3V signaling environment. The ML455 is intended to plug-in to a 3.3V
keyed system board. The ML455 board is not a Universal add-in card nor is it intended to
plug into a 5V keyed system board.
Figure 1-1 shows how to identify a 3.3V system board
slot (left side) from a non-supported 5V-system board slot (right side).
The ML455 board is supported by Xilinx PCI and PCI-X LogiCORE versions 3.0 and 5.0,
respectively.
Table 1-1 lists the Xilinx PCI and PCI-X cores.
Figure 1-1: Add-in Card Connectors
Table 1-1: Xilinx PCI and PCI-X Cores
Version
Bus
Mode
Bus Width
Clock
Frequency
Clock Type
(FPGA Pin #)
v3.0 PCI 64 bits 66 MHz Regional (D2)
v3.0 PCI 64 bits 33 MHz Regional (D2)
v3.0 PCI 64 bits 33 MHz Global (C13)
v5.0 PCI-X 64 bits 133 MHz Global (C13)
v5.0 PCI-X 64 bits 100 MHz Global (C13)
v5.0 PCI-X 64 bits 66 MHz Global (C13)
v5.0 PCI 64 bits 33 MHz Global (C13)
3.3V 64-bit Connector
rear of
computer chassis
rear of
computer chassis
5V 64-bit Connector
ug084_c1_01_050605
3.3V Add-in Card
I/O Buffers Powered
on 3.0V Rail
Dual Voltage Signalling
Add-in Card
I/O Buffers Powered on
Connector Dependent Rail
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