Xilinx Virtex-4 ML455, User Manual

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Virtex-4 ML455 PCI/PCI-X Board www.xilinx.com 27
UG084 (v1.0) May 17, 2005
64-bit PCI Edge Connector
R
The two PCI buses on the board schematics have signal names of the form EDGE_<signal
name> (denoting the card edge connector signals) and SKT_<signal name> (denoting the
signals wired to the top mounted PCI socket). The signal names listed in the A Side and B
Side columns of
Table 3-11 and Table 3-12 are standard PCI signal names.
The ML455 board supports both PCI and PCI-X applications. The edge connector
interfaces with the system board connector. Xilinx has both PCI and PCI-X LogiCORE
intellectual property cores available to facilitate getting started with application specific
design.
A72 GND B72 EDGE_AD57
A73 EDGE_AD56 B73 GND
A74 EDGE_AD54 B74 EDGE_AD55
A75 VCC3V3 B75 EDGE_AD53
A76 EDGE_AD52 B76 GND
A77 EDGE_AD50 B77 EDGE_AD51
A78 GND B78 EDGE_AD49
A79 EDGE_AD48 B79 VCC3V3
A80 EDGE_AD46 B80 EDGE_AD47
A81 GND B81 EDGE_AD45
A82 EDGE_AD44 B82 GND
A83 EDGE_AD42 B83 EDGE_AD43
A84 VCC3V3 B84 EDGE_AD41
A85 EDGE_AD40 B85 GND
A86 EDGE_AD38 B86 EDGE_AD39
A87 GND B87 EDGE_AD37
A88 EDGE_AD36 B88 VCC3V3
A89 EDGE_AD34 B89 EDGE_AD35
A90 GND B90 EDGE_AD33
A91 EDGE_AD32 B91 GND
A92 unused B92 unused
A93 GND B93 unused
A94 unused B94 GND
Table 3-11: P1 PCI Edge Connector Pinout (Continued)
P1 A Side Signal P1 B Side Signal
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