Xilinx Virtex-4 FX FPGA, User Manual

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24 www.xilinx.com ML42 x User Guide
UG087 (v1.3) May 30, 2008
Detailed Description
R
Note:
All remaining I/O pins are connected to external capacitors for I/O load testing.
13. Program Switch (Active-Low)
The active-Low program switch, when pressed, grounds the program pin of the FPGA.
14. Reset Switch (Active-Low)
The active-Low reset switch resets the System ACE controller.
15. DONE LED
The DONE LED indicates the status of the DONE pin of the FPGA. This LED lights when
DONE is High, indicating the FPGA is programed or that power is applied to the board
without a part in the socket.
16. INIT LED
The INIT LED lights during initialization.
Table 19: LVDS Header (J101)
Pin Number ML421 ML423 ML424
1 C29 C34
3 D29 D34
5 D31 J32
7 E31 K32
9 F31 F35
1 E32 G35
13 G31 F36
15 G32 G36
17 J29 H35
19 K29 J35
21 M25 K33
23 M26 L33
25 N32 T29
27 P32 T30
29 U27 V27
31 U28 W27
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