ZU19 Zynq Ult MPSoC PCIe Loopback
Test
The QDMA IP and DPDK driver are used to perform the PCIe loop back test. The host generates
Ethernet packets with the help of the DPDK pktgen application. The QDMA poll mode driver
helps to control the QDMA IP inside the programmable logic from the host. The DPDK pktgen
application sends the packets to QDMA and the same packets are redirected to QDMA, so the
packets sent by the pktgen application are received by pktgen itself.
Test Procedure
1. Set up the system as shown in the following figure.
DPDK-Pktgen Port0
MPSoC
Host
PCIe
X8
RFSoC
PCIe
X8
T1 Telco Accelerator Card
Queue7_PCIe Data Path
X25238-033121
2. Ensure the conditions in the
Chapter 2: Card Information and Installation
met.
3. Run the
test.sh
in root, with
init
as argument, to initialize the DMA and DPDK drivers.
4. Execute
test.sh
script, with
mpci
as argument, to launch the Pktgen application with one
port.
5. Set the packet size to 1514 with the command
set all size 1514
inside the Pktgen
application.
6. Start the traffic with the command
start all
and analyze the throughput.
7. Observe the RX and TX rate and check whether there is any loss.
8. When the test is complete, stop traffic with the command
stop all
and then quit the test.
The expected results from running the Zynq Ult MPSoC PCIe loopback test are
shown below.
Chapter 6: Running the Tests
UG1518 (v1.0) December 17, 2021
T1 Telco Accelerator Card Installation Guide
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