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Summary of Contents for Dove

Page 1: ...XEROX Dove lOP Board Technical Reference Manual Version 1 2 July 1987...

Page 2: ...Dove lOP Board Technical Reference Manual Xerox Corporation Document Systems Business Unit Processor Development 475 Oakmead Parkway Sunnyvale California 94086...

Page 3: ...oduced using ViewPoint on a 6085 Professional Computer System printed on a Xerox 8040 RAVEN laser printer and reproduced on a Xerox 9900 High Speed Copier Copyright co Xerox Corporation 1985 1986 and...

Page 4: ...ware describes pins and signals ofthe component Theory of Operations describes system operating modes which may include timing Programmer Interface describes register assignments and timing An addendu...

Page 5: ...n sheet on the FDC 9229 chip Standard Microsystems Corporation LAN Components User s Manual Intel Corporation 1984 MCC Manchester Code Converter 8023A Data Sheet Seeq Technology Incorporated 1985 Memo...

Page 6: ...timer unit 2 2 4 Integrated interrupt controller 2 2 5 Clock generator 2 2 6 Chip select unit 2 2 7 Integrated peripheral accessing 2 3 Programmer Interface 2 3 1 Processor reset and initialization 2...

Page 7: ...tions 4 2 3 Arbiter flow diagrams 5 Rigid Disk Subsystem Subsystem architecture S bsystem programming overview 5 1 Rigid Disk Drive 5 l 1 Hardware 5 l 2 Theory Programmer interface 5 2 Rigid Disk Cont...

Page 8: ...46 5 3 3 2 Word count 5 47 5 3 3 3 Control register on AM2942 chip 5 47 5 3 3 4 DMA command register 5 48 5 3 3 5 DMA status register 5 48 5 3 3 6 Programming DMA transfers 5 49 5 4 Rigid Disk FIFO 5...

Page 9: ...7 1 Hardware 7 2 7 1 1 Floppy disk drives 7 2 7 1 2 Diskettes 7 2 7 1 3 Floppy disk controller 7 3 7 l 3 1 Controller interface 7 3 7 1 3 2 Data separator 7 6 7 2 Theory of Operations 7 8 7 2 1 Flopp...

Page 10: ...8 12 8 3 2 8274 serial controller registers 8 13 8 3 2 1 Write registers 8 13 8 3 2 2 Read registers 8 17 8 3 3 8254 timer registers 8 18 9 Keyboard Mouse Controller and Maintenance Panel 9 1 Hardwar...

Page 11: ...7 10 7 10 3 2 1 Operational descriptions and configurations 10 7 10 3 2 2 Initialization 10 7 10 3 2 3 Sen Hng a byte 10 8 10 3 2 4 Receiving a byte 10 8 10 3 2 5 Sending boot Reset signal to debuggee...

Page 12: ...10 80186 integrated peripheral control block 2 11 Section 3 3 1 lOP address space 3 1 3 2 lOP memory address space bit assignment 3 2 3 3 IOP interrupts 3 4 3 4 Interrupt pointer table 3 6 3 5 Conten...

Page 13: ...7 5 17 DMA states III Transfer conclusion 5 28 5 18 DMA timing No wait states 5 32 5 19 DMA timing One wait state 5 33 5 20 DMA timing Two wait states 5 34 5 21 DMA timing Starting DMA operation 5 35...

Page 14: ...disk controller pins and signals 7 4 7 4 8272 floppy disk controller interface pins and signals 7 5 7 5 9229 data separator pins and signals 7 7 7 6 System interface 7 8 7 7 FDC status register 7 11 7...

Page 15: ...ignals 10 4 10 5 Line driver circuits 10 4 10 6 Line receiver circuits 10 5 10 7 Flow diagram ofsending and receiving a byte 10 5 10 8 Transmission cable flow 10 6 10 9 Timing diagram for read and wri...

Page 16: ...ence RDC requests service 4 5 4 4 RDC requests service then Ethernet requests service 4 6 4 5 RDC and Ethernet request service 4 6 4 6 RDC and Ethernet request service at the same time 4 7 4 7 Etherne...

Page 17: ...interface pin assignments 7 5 7 4 9229 pin assignments 7 7 7 5 Registers and addresses 7 11 7 6 DMA registers 7 13 7 7 Timer registers 7 14 Section 8 8 1 8274 serial controller pin assignments 8 2 8...

Page 18: ...cteristics 10 9 Appendix A A 1 Disk operations A I A 2 Header and label layout in scratchpad and FIFO A 2 A 3 Error codes A 5 A 4 States of the state machine PROM contents A 8 Appendix B B 1 Read Data...

Page 19: ...Dove lOP Board B 14 Sense Drive Status instruction set B 8 B 15 Seek instruction set B 8 B 16 Invalid instruction set B 8 xiv Table ofContents...

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