Production Data
WM9090
w
PD, November 2010, Rev 4.1
51
REGISTER
ADDRESS
BIT LABEL
DEFAULT DESCRIPTION
8
DCS_TRIG_SERIES
_0
0
Writing 1 to this bit selects a
series of DC offset corrections
for HPOUT1L.
In readback, a value of 1
indicates that the DC Servo DAC
Write correction is in progress.
R85 (55h)
DC Servo 1
11:5 DCS_SERIES_NO_
01 [6:0]
010 1010
Number of DC Servo updates to
perform in a series event.
0 = 1 updates
1 = 2 updates
...
127 = 128 updates
3:0
DCS_TIMER_PERI
OD_01 [3:0]
1010
Time between periodic updates.
Time is calculated as
0.256s x (2^PERIOD)
0000 = Off
0001 = 0.52s
1010 = 266s (4min 26s)
1111 = 8519s (2hr 22s)
Table 29 DC Servo Active Modes
DC SERVO READBACK
The current DC offset value for each Headphone output channel can be read from Registers R89 and
R90, as described in Table 30. Note that these values may form the basis of settings that are
subsequently used by the DC Servo in DAC Write mode.
REGISTER
ADDRESS
BIT LABEL
DEFAULT DESCRIPTION
R89 (59h)
DC Servo
Readback 1
7:0
DCS_DAC_WR_VA
L_1_RD
0000 0000
Readback value for HPOUT1R.
Two’s complement format.
LSB is 0.25mV.
Range is -32mV to +31.75mV
R90 (5Ah)
DC Servo
Readback 2
7:0
DCS_DAC_WR_VA
L_0_RD
0000 0000
Readback value for HPOUT1L.
Two’s complement format.
LSB is 0.25mV.
Range is -32mV to +31.75mV
Table 30 DC Servo Readback
