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User Manual
2.4. SGMII interface
The M14Q2SG includes integrated Ethernet MAC with SGMII interfaces with the following key features:
IEEE 802.3 compliance
Full duplex at 1 Gbps
Half/full duplex for 10/100 Mbps
Supports VLAN tagging
Supports IEEE 1588, Precision Time Protocol (PTP)
Can be used to connect to external Ethernet PHYs such as AR8033 or to an external switch
The following figures describe an example of the additional logic connection between the M14Q2SG and
the Ethernet chip.
Figure 3. SGMII circuit example
Layout suggestion:
Differential impedance:100 Ω
Space to other signals: > 3x line width
Lane-to-lane space: > 3x line width
Intra-lane mismatch: < 0.7 mm