PPC65BP-1x/Configuration
v1.0
www.winsystems.com
Page 33
8.3.9 USB Port 3 Connector (J22, 1 x
4
Pin Wafer/2mm)
Layout and Pin Reference
8.3.10 CMOS Setup (JP1)
Layout and Pin Reference
8.3.11 LCD Panel Inverter ON/OFF Signal Setup (JP2)
The following table contains descriptions of the signal setup for different
jumpers installed.
Layout and Pin Reference
Pin
Description
1
+ 5 V
2
USB_D3-
3
4
GND
1
Jumper
Description
1-2
Normal (Keep CMOS setup, default)
2-3
Clear CMOS setup
1
Jumper
Description
1-3
2-4
+5 V high active (default)
1-3
4-6
+12 V high active
2-4
3-5
+5 V low active
3-5
4-6
+12 V low active
1
2
3
4
5
6
Summary of Contents for PPC65BP-1 Series
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