
600 Industrial Drive
New Bern, NC 28562
page 7 - 13
3-22-06
W# 700871
84S0164-2
SA
SA
SA/WWP
A
2 OF 2
MSTR-7
MSTR-7A PCB
D-7 / June 2006
D
A
C
B
D
A
C
B
1
1
8
8
2
2
7
7
3
3
6
6
4
4
5
5
D
DWG. NO.
FSCM NO.
ISSUED
CHECKED
DRAWN
SHEET
SCALE
CONTRACT NO.
REV
SIZE
DATE
APPROVALS
- SA UR US - Sergey Averin -
+3.3V
GND
VCC
+3.3V
GND
GND
+3.3V
+3.3V
GND
FDR_2.5REF
GND
FDR_2.5REF
GND
FDR_2.5REF
GND
FDR_2.5REF
GND
C7
0.1uF
0.1uF
C5
LT1117
3
1
2
Q4
GND
IN OUT
ADR291
2
4
6
U5
+2.5V
GND
VCC
0.1uF
C4
0.1uF
C3
ADS7841
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
U7
BUSY
DOUT
VCC
VCC
GND
VREF
DCLK
___
CS
_____
SHDN
DIN
CH0
CH1
CH2
CH3
COM
MODE
LT1117
3
1
2
Q2
GND
IN OUT
+3.3V
GND
GND
+3.3V
ADS7841
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
U6
BUSY
DOUT
VCC
VCC
GND
VREF
DCLK
___
CS
_____
SHDN
DIN
CH0
CH1
CH2
CH3
COM
MODE
0.1uF
C30
FDR_2.5REF
GND
FDR_2.5REF
GND
FDR_2.5REF
GND
GND
100K
R42
GND
GND
1uF
C47
1
2
3
4
5
CT10
GND
100K
R46
GND
GND
1uF
C48
1
2
3
4
5
CT12
GND
GND
GND
1
2
3
4
5
CT5
GND
GND
GND
1
2
3
4
5
CT8
GND
GND
GND
CT1
1
2
3
4
5
GND
GND
GND
1
2
3
4
5
CT3
100K
R23
1uF
C44
100K
R9
1uF
C43
100K
R7
1uF
C38
100K
R3
1uF
C37
220
R1
8
+3.3V
DS1
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CT14
VCC
GND
6
5
4
3
2
1
CT7
1.00K
R19
+3.3V
+3.3V
+3.3V
1.00K
R10
1.00K
R11
+3.3V
+3.3V
GND
10.0K
R12
VCC
GND
4148 D24
4.99K
R13
J2
J1
5.1
R28
5.1
R30
43
42
40
31
29
27
25
21
19
15
14
13
10
9
7
5
3
XC18V01
U2
D6
D0
D1
D2
D3
D4
D5
TDO
D7
____
CLK
TDI
TCK
CF
OE/RST
___
CE
____
TMS
CEO
20
19
17
13
10
8
7
6
5
4
3
1
XCF01
U3
TDO
D0
___
CF
____
VCCO
CEO
____
CLK
TMS
TDI
TCK
OE/RST
___
VCCJ
CE
8
7
6
5
4
1
DS1706
U1
_____
___
IN
ST
PBRST
NMI
____
___
___
RST
WDS
4.99K
R38
5.1
R27
142
141
140
139
138
137
136
134
133
132
131
130
129
126
124
123
122
121
120
118
117
116
115
114
113
112
111
109
106
103
102
101
100
99
96
95
94
93
91
88
87
86
85
84
83
80
79
78
77
76
75
74
72
69
68
67
66
65
64
63
62
60
59
58
57
56
54
51
50
49
48
47
46
44
43
42
41
40
39
38
37
34
32
31
30
29
28
27
26
23
22
21
20
19
18
15
13
12
11
10
7
6
5
4
3
2
XC2S100
U4
____
PAD434
PAD380
PAD374,Vref3
PAD362
PAD353,Vref3
PAD350
PAD347,Vref3
PAD341
PAD328
PAD325
PAD322
PAD428,Vref2
PAD316,Vref4
PAD313
PAD310,Vref4
PAD307
PAD304
PAD301
PAD289,Vref4
PAD283
PAD280
PAD266
PAD425
PAD260,Vref5
PAD248
PAD245
PAD242
PAD239,Vref5
PAD236
PAD233,Vref5
PAD227
PAD215
PAD212
PAD422,Vref2
PAD209
PAD203,Vref6
PAD200
PAD197,Vref6
PAD194
PAD191
PAD188
PAD176,Vref6
PAD173
PAD170
PAD413
PAD164,TRDY
TDO
DONE
BUSY,DOUT,I/O
INIT,I/O
PAD401,Vref2
PAD395
PAD389,IRDY
PAD386,TRDY
PAD161,IRDY
PAD122,Vref7
PAD116
PAD113
PAD104
PAD101
PAD95,Vref0
PAD89,Vref0
PAD86
PAD83
PAD80
PAD155
PAD68,Vref0
PAD62
PAD48
PAD45
PAD39,Vref1
PAD27
PAD24
PAD21
PAD18,Vref1
PAD12,Vref1
PAD152
PAD6
D7,I/O
D6,I/O
D5,I/O
D4,I/O
D3,I/O
D2,I/O
D1,I/O
D0,DIN,I/O
PAD149,Vref7
GCK3,I
GCK2,I
GCK1,I
GCK0,I
TCK
TMS
TDI
PAD137
WRITE,I/O
______
CS,I/O
___
M2
M1
M0
PROGRAM
_________
CCLK
PAD134
PAD131
PAD128,Vref7
PAD125
1.00K R25
1.00K R26
1.00K R29
BR0
BR1
1.00K
R48
GND
1.00K
R44
GND
1.00K
R8
GND
1.00K
R4
GND
332
R47
332
R41
332
R6
332
R2
VCC
VCC
VCC
VCC
FDN340P
Q5
Q3
FDN340P
Q1
FDN340P
FDN340P
Q6
0.01uF
C18
0.01uF
C19
GND
GND
GND
D26 BAT54
D26
BAT54
10.0K
R17
220
R37
332
R36
GND
+3.3V
0.1uF
C50
0.1uF
C46
0.1uF
C26
0.1uF
C15
0.1uF
C6
0.1uF
C1
33
R43
1.00K
R5
R50
1.00K
GND
GND
1.00K
R33
GND
1.00K
R31
1.00K
R51
GND
GND
1.00K
R35
GND
1.00K
R34
GND
1.00K
R1
GND
1.00K
R40
GND
1.00K
R14
GND
FDR_MSTR_1
FDR_MSTR_2
FDR_2.5REF
AD_MSTR_CLK
AD_MSTR_SDI
AD_MSTR_SDO
FDR_2.5REF
FDR_SUB_1
FDR_SUB_2
FDR_SUB_3
FDR_SUB_4
FDR_2.5REF
AD_SUB_CLK
AD_SUB_SDI
AD_SUB_SDO
FDR_MSTR_2
FDR_2.5REF
FDR_MSTR_1
FDR_2.5REF
FDR_SUB_2
FDR_2.5REF
FDR_SUB_1
FDR_2.5REF
FDR_SUB_4
FDR_2.5REF
FDR_SUB_3
FDR_2.5REF
DONE
MDL_CLK
MDL_FSYNC
CPU2MDL
MDL2CPU
SLID[0]
SLID[1]
SLID[2]
SLID[3]
GLOBAL_ARB
LOCAL_ARB
TMS
TDI
TDO
TCK
GND
+3.3V
PROMDATA
TMS
TDI
TCK
INIT
DONE
CCLK
TDO
TMS
TDI
TCK
PROMDATA
CCLK
INIT
DONE
PROMDATA
+2.5V
FPGA_TDI
+3.3V
INIT
DONE
CCLK
GND
PROMDATA
TCK
TMS
FPGA_TDI
TDO
MDL_CLK
GND
GND
GND
GND
FSIN
FSOUT
VCC
LED_A
LED_B
VCC
LED_D
VCC
VCC
LED_C
FSOUT
FSIN
MDL_CLK
SLID[3]
LOCAL_ARB
SLID[2]
GLOBAL_ARB
AD_MSTR_SDI
AD_MSTR_SDO
SW_C_X
AD_SUB_CLK
SW_Y_2
MDL2CPU
CPU2MDL
SLID[0]
MDL_FSYNC
SLID[1]
SW_Y_0
SW_0_X
AD_MSTR_CLK
AD_SUB_SDI
AD_SUB_SDO
SW_Y_8
SW_Y_9
SW_Y_7
SW_4_X
SW_8_X
SW_Y_1
SW_Y_4
SW_Y_3
SW_Y_5
SW_Y_6
SW_Y_1
SW_Y_0
SW_Y_3
SW_Y_2
SW_Y_4
SW_Y_5
SW_Y_6
SW_Y_7
SW_Y_8
SW_Y_9
MSTR 2
MSTR 1
SUB 1
SUB 2
SUB 3
SUB 4
3.3V
2.5V
NOT INSTALLED
NOT INSTALLED
Summary of Contents for D-7
Page 40: ...page 6 1 D 7 June 2006 M E T E R B R I D G E Meterbridge Chapter Contents Overview 6 2 ...
Page 46: ...page 7 5 IP 6 4 Input Panel Switch Card Load Sheet D 7 June 2006 ...
Page 52: ...page 7 11 MN 6 Control Panel Switch Card Load Sheet D 7 June 2006 ...
Page 55: ...page 7 14 MSTR 7 Master Panel Switch Card Load Sheet D 7 June 2006 ...
Page 56: ...D 7 June 2006 page 7 15 ...
Page 57: ...D 7 June 2006 page 7 16 ...
Page 58: ...D 7 June 2006 page 7 17 ...
Page 59: ...D 7 June 2006 page 7 18 ...
Page 60: ...page 7 19 HC 3 Host Controller Card Load Sheet D 7 June 2006 ...
Page 61: ...D 7 June 2006 page 7 20 ...
Page 62: ...D 7 June 2006 page 7 21 ...
Page 64: ...D 7 June 2006 page 7 23 ...
Page 66: ...page 7 25 D 7 June 2006 ...