Wavecom GR64, Application Note, Page: 15 / 26

2.4.3 Wireless CPU® Initiated Sleep
The example shows a similar situation to section 2.4.1, where the Wireless CPU® is
going through its initial power-up. After exchanging some data the Wireless CPU®
initiates sleep. The Host responds within the time-out period
a .
Figure 4. Wireless CPU® initiates sleep, Host initiates time-out period
a
Time Description
1 The Wireless CPU® is un-powered at this point, all UART1 signals are inactive.
2 The Wireless CPU® has completed its power-up cycle and all UART signals are active.
The UART interfaces are ready to communicate, as indicated by the respective states
of the hardware flow control lines.
3 The first serial data is sent from the Wireless CPU® to the Host.
4 The Host sends data to the Wireless CPU®, followed by a period of inactivity.
5 The Wireless CPU® requests sleep mode initiation by de-asserting DSR1 & CTS1.
6 Within the request timeout period
a
, the Wireless CPU® acknowledges the request by
setting DSR1 and CTS1 signals high, thereby beginning the sleep period. The flow
control lines will remain inactive from this point onwards, until such time as a wake-
up event is triggered.
The time-out period
a is 500ms max. If this period elapses with no
acknowledgement from the Host, the Wireless CPU® will wait for a
pre-defined period before making a further attempt to request
sleep mode initiation.
NOTE
APPLICATION NOTE
GR/GS64 UART Sleep Protocols
Page: 15/26
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