CM52 Integrators’ Manual
CM52 Integrators’ Manual
WI_DEV_CM52_UGD_001-001
Page 19 of 53
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Ce document est la propriété exclusive de WAVECOM. Il ne peut être communiqué ou divulgué à des tiers sans son autorisation préalable
2.3.2
System Connector Interface Pinout
Pin
Signal
Description
Dir
Pin Type
Alternate
Function
Dir
Pin
Type
1 Reserved
TIMEMARK
O CMOS
2
VREF
Logic Voltage
O
Reference
3 Reserved
GPS Fix
1
O CMOS
4
VRTC
Supply pin for RTC
I Power GPS
VRTC
1
I Supply
5
GND
Chassis Ground
Ground
6
GND
Chassis Ground
Ground
7
AFMS
Analog Audio from Wireless CPU
®
O Audio
8
GND
Chassis Ground
Ground
9 AGND
Analog
Reference
Audio
10
ATMS
Analog Audio to Wireless CPU
®
I Audio
11 Reserved
UART3_RX
1
I CMOS
12
MODULE_PWR_EN_B
Switches the Wireless CPU
®
on/off
(hardware-wise), active low
I
13 Reserved
UART3_TX
1
O CMOS
14 Reserved
15 HW_SD
Hardware
shutdown
I/O
16 Reserved
17
PCMCLK
PCM Clock output
O
CMOS
18 PCMSYNC
PCM
Frame
sync
O CMOS
19
PCMULD
PCM Voice input to Wireless CPU
®
I CMOS
20
PCMDLD
PCM Voice output from Wireless CPU
®
O CMOS
21 GND
Chassis
Ground
Ground
22 GND
Chassis
Ground
Ground
23
DCD / VPPFLASH
Data Carrier Detect & Flash programming
voltage input
O / I
CMOS /
Power
24 Reserved
O
RINGER O
CMOS
1
Default function if GPS option on board
2
Default function if RTC option on board