VXI VT1433B, User Manual, Page: 184 / 203

q
Parameter 1-7 Registers: These are 32-bit RAM locations used to pass parameters
along with commands to the device or query responses from the device. See the
following section regarding D16/D08 access of 32-bit registers and the communication
protocol.
32-bit Registers
Several of the A16 registers (and all other 24-bit registers) are implemented as
32-bit-only resources. These are accessible using VME Bus D16 and D08(EO)
accesses. However certain restrictions apply. The affected A16 registers are:
q
RAM 0-1
q
Send Data
q
Receive Data
q
Query Response Command
q
Parameter 1-7
Reading 32-bit Registers
When reading a 32-bit register using 8- or 16-bit modes, a simple caching
mechanism is used. On any read including the most significant byte (lowest
address), the 32-bit register is read and all 32-bits are latched into the read cache.
A read not including the most significant byte fetches data from the read cache,
without re-reading the register. This insures that the data will be unchanged by
any intervening write by the DSP (which would result in garbled data).
This mechanism also introduces a hazard. Reads of less significant bytes get data
from the 32-bit register last read by a most-significant-byte read. In other words,
the least significant byte can’t be read first or by itself. Thus there are two
important rules:
1
Always read all 32 bits of a 32-bit register.
2
Always read the most significant part first.
Writing 32-bit Registers
When writing to a 32-bit register using 8- or 16-bit modes, a simple caching
scheme is also employed. On any write not including the least significant byte
(highest address), the data is latched into the write cache. A write to the least
significant byte causes the cached data to be written to the 32-bit register (in
parallel with the current data for the least significant bytes(s).
This mechanism has its own hazards. Writes to the least significant byte will
always include the most recently cashed data, whether intended for that register or
not. Lone writes to the most significant part of a 32-bit register will be lost if
not followed by a write to the least significant part of the same register. Thus
there are two important rules:
3 Always write all 32 bits of a 32-bit register.
4 Always write the least significant part last.
VT1433B User's Guide
Register Definitions
A-10