VXI VT1422A, User Manual

Page: 408 / 529

406 VT1422A Command Reference Chapter 7
IEEE-488.2 Common Command Reference
•
IF error 3052 'Self test failed. Test info in FIFO' is returned. A FIFO value of
1 through 99 or
≥
300 is a failed test number. A value of 100 through 163 is a
channel number for the failed test. A value of 200 through 204 is an A/D range
number for the failed test where 200 = 0.0625, 201 = 0.25V, 202 = 1 V, 203 = 4 V,
and 204 = 16 V ranges. For example DATA:FIFO? returns the values 72 and
108.
This indicates that test number 72 failed on channel 8.
Test numbers 20, 30-37, 72, 74-76, and 80-93 may indicate a problem with a
Signal Conditioning Plug-on.
For tests 20 and 30-37, remove all SCPs and see if *TST? passes. If so,
replace SCPs one at a time until the one causing the problem is found.
For tests 72, 74-76, and 80-93, try to re-seat the SCP that the channel number(s)
points to or move the SCP and see if the failure(s) follow the SCP. If the problems
move with the SCP, replace the SCP.
These are the only tests where the user should troubleshoot a problem.
Other tests which fail should be referred to qualified repair personnel.
Note
Executing *TST? returns the module to its *RST state. *RST causes the FIFO data
format to return to its default of ASC,7. To read the FIFO for *TST? diagnostic
information in a format other than ASCII,7 format, be certain to set the data FIFO
format to the desired format (FORMAT command) after completion of *TST? but
before executing a SENSE:DATA:FIFO: query command.
•
The data type for this returned value is int16 .
•
Following *TST?, the module is placed in the *RST state. This returns many of
the module's programmed states to their defaults. See “*RST” on page 403 for
a list of the module's default states.
•
*TST? performs the following tests on the VT1422A and installed Signal
Conditioning Plug-ons:
DIGITAL TESTS:
Test# Description
1-3: Writes and reads patterns to registers via A16 & A24
4-5: Checks FIFO and CVT
6: Checks measurement complete (Measuring) status bit
7: Checks operation of FIFO half and FIFO full IRQ generation
8-9: Checks trigger operation