VTI Instruments
38
EMX-75XX Index
Data in output register(s) of concerned port is reset (set to all F’s) after reset and any operation that
involves voltage configuration, as listed below:
4)
When card is reset. All ports are affected.
5)
Port voltage configuration is done. Only concerned port is affected.
On output channels, changing the polarity flips the state of data lines and further writes are done
according to polarity selection (for example, if polarity is configured as reversed then writing 1 to
a channel writes a 0 to it and vice versa).
Configuration Section
This section of circuit is used to select reference voltage (V
CLAMP
) for ports. Each port has a set of
programmatically controlled switches that let the user select a voltage from 3.3 V, 5 V, 12 V, 24 V
and User supplied voltage, which can be anywhere from 3.3 V to 60 V. In addition, LV and TTL
emulation modes can be selected which use 3.3 V and 5 V as V
CLAMP
respectively, and insert a low
impedance pull-up resistor in the path to source 4 mA.
Output Section
The output section of each channel consists of an N-channel MOSFET, pull-up resistors and over
current sense circuitry. When a 1 is driven on channel, the MOSFET is turned off and data line is
pulled-up to V
CLAMP
using appropriate pull-up resistor (330
Ω for LV emulation, 500
Ω for TTL
emulation and 100
kΩ otherwise
). The rising voltage level at data channel exhibits RC charging
with a rise time of approximately 70
μs with 100 kΩ pull
-up resistor and about 600 ns with low
impedance pull-up in TTL and LV voltage configurations. When a 0 is driven on channel, the
MOSFET is turned on and data line is connected to ground via a current sense resistor of 0.3
Ω.
The falling edge is much sharper with a maximum fall time of 300 ns approximately. Please refer
to electrical characteristics for output voltage levels with different load resistance.
The load resistor and pull-up resistor form a voltage divider of V
CLAMP
and determine output
voltage, thus output voltage decreases with decreasing load resistance. The minimum load
resistance that can be connected on channels is 500
Ω for LV emulation, 750
Ω for TTL emulation
and 150
kΩ otherwise.
The data lines have a current sinking capacity of 300 mA. If the current through MOSFET
increases above limited value, the over current protection circuit turns off all FETs in the
concerned port. The over current condition must last for greater than 12.8 µs before over current
protection circuit is activated. This is done to prevent false over current events due to transients. It
takes approximately 20 µs from first occurrence of the over current event before the FETs are
turned off. The over current circuit will activate with 340 mA hold current and 475 mA trip
current, where hold current is the maximum current circuit will allow without tripping and trip
current is the minimum current required to trip the circuit. The absolute maximum limit on sinking
current is 500 mA. Staying within these limits is user’s responsibility. Over current readings from
ports will be latched and can be read by user. When they reset over current condition then port will
be enabled and data last written to port will be applied on channels.
Sinking Current Typical connection
