Vmetro VBAT-PB, User Manual, Page: 85 / 186

4 Operation
As for the signals and their explanation, see the two previous sections VMEbus
Utilization measurement, and VSB Utilization measurement.
Counters Operation
The VBT-325 implements eight 20-bit wide statistics counters for VMEbus and
four 20-bit counters for the P2 bus:
• F o u r VMEbus Event Counters
• F o u r VMEbus Bus Level Counters
• F o u r P2 Event Counters
Each of these counters may count up to 1048576 (1M). A counter is
incremented only when a bus sample matches the criteria assigned to its word
recognizer. For the Event Counters, one particular event pattern is assigned to
each counter, and for the Bus Level Counters, one of the four VMEbus Bus
Levels is assigned to each counter. (The VMEbus Bus Levels are derived from
the Bus Grant lines BG3:0*, refer to the ch. "FUNCTIONAL DESCRIPTION,
Sampling methods, Bus Grant latching - BgL" for details.).
The block diagram below highlights the parts of the VBT-325 which take part
in the counter-driven statistics measurements.
Ed.
inputs
Te r m i n a l ÷ _ >
Host /
Printer
4
VMEbus
99 ch.
Sampling 11 . . .
registers
4 '
4 x Word
Recognizers
7riX.f.>
t i r •
••1440 ' ; •
A
of
Clock
generation
Statistics
counters
-->
4 Event Cnt
4 BgL Cnt
1 Total Cnt
P2 rows a/c
64 ch.
4 x Word
Recognizers
VSB SCSI User
Clock sel.
jumpers
/
1race •-•
V
Processor - Serial Ports - RT clock - Voltage/Temp monitors - LED display
Clock
generation
Statistics
counters
4 Event Cnt
1 Total Cnt
Figure 33. VBT-325 Block diagram with parts involved in counter-driven
statistics highlighted.
70 V B T - 3 2 5 User's Manual
VMETRO