VSC8211 Evaluation Board
User Guide
Revision 1.0
December 2013
Vitesse Proprietary
Page 12 of 13
Verify that the device is up and running by reading MII Register 0. It should read back
0x1040. Reading back “0000” or “FFFF” (all 0’s or all 1’s) indicates a problem.
To read or write the extended MII registers click on the ExtMII tab.
An initialization script may be used to configure multiple VSC8211 registers. The
initialization script is simply a text file which contains a list of registers to be written.
Select the Device item on the top pull down menu area and click on Load-All-Registers
option. A pop-up window will appear. Navigate to and select the desired script to be
loaded.
As per Section 31.1 of the datasheet, there are a number of internal registers that
must be changed from their default value during device initialization. Use this method
to initialize the device by loading “vsc8211_workaround33_1.txt” included in the GUI
package under the Script/ directory. GUI Setup
3.4
Test Cases
3.4.1
CAT5 to SGMII with Clause 37 AutoNeg Enabled
After power-up or reset, VSC8211 as configured on the evaluation board will operate
according to CAT5 to SGMII with Clause 37 Auto Negotiation enabled. The 1G Ethernet
received at the RJ-45 port is routed through the VSC8211 and looped back via SGMII
through SMA cables.
1.
Set up the copper Ethernet traffic source (e.g., IXIA or Smartbits)
2.
Connect an Ethernet cable to an RJ-45.
3.
Loopback SGMII RXDOUT to TXDIN via SMA cables.
4.
Monitor the link-up bit in MII Register 1, bit 2 (MII 1.2), read twice to update.
Traffic should now be flowing.
3.4.2
CAT5 to RGMII
1.
Set up the copper Ethernet traffic source (e.g., IXIA or Smartbit) and connect a
CAT5e cable to the RJ-45.
2.
Loopback the RGMII signals using 0-ohm header jumpers on J16.
3.
Write 0x1824 to MII Register 23 (Port 0, PHY Control #1). This also sets the
internal RGMII TXC skew to 2.0ns for this board.
4.
Write 0x9040 to MII Register 0 (Port 0, SW Reset for PHY Control setting to take
effect).
5.
Monitor the link-up bit in MII Register 1, bit 2 (MII 1.2), read twice to update.
Traffic should be flowing.