VIA Technologies KT400A, User Manual

Page: 40 / 88

BIOS
Page 4-8
DRAM Clock / Drive Control
Scroll to DRAM Clock/Drive Control and press <Enter>. The following screen appears:
DRAM Timing
For setting DRAM Timing select By SPD to follow SDRAM Serial Presence Detect
Specification.
Options: Manual, Auto by SPD, Turbo, Ultra.
DRAM CAS Latency
Enables you to select the CAS latency time. The value is set at the factory depending
on the DRAM installed. Do not change the values in this field unless you change
specifications of the installed DRAM and DRAM clock from DRAM Timing Selectable.
The default is set by SPD (see ‘DRAM Timing’).
Options: 1.5, 2, 2.5, 3.
Bank Interleave
The item allows you to set how many banks of SDRAM support in your mainboard.
Default is by SPD.
Options: 2 Bank, 4 Bank, Disabled.
Precharge to Active (Trp)
This item refers to the number of cycles required to return data to its original
location to close the bank or the number of cycles required to page memory before
the next bank activate command can be issued. The default is by DRAM SPD.
Options: 3T, 2T, 4T, 5T.
Tras Non-DDR400/DDR400
This item sets tRAS Non-DDR400/DDR400 timing. The default is by DRAM SPD.
Options: 6T/8T, 7T/10T, 5T/6T, 8T/12T.