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VESTEL MB120 DS, Service Manual

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Page: 72 / 84

VESTEL MB120 DS Service Manual Download Page 72

03_G6F_DDR3

15-08-2016_15:00

18mb120-r2

15

NAMIK GOKCEDAGLI

8

7

6

5

4

3

2

1

A

B

C

D

E

F

A X M

1

2

3

4

5

6

7

8

A

B

C

D

E

F

A3

PROJECT NAME :

VESTEL

SCH NAME :

DRAWN BY :

T. SHT:

A_DQSU

A_DQSUN

A_DQSL

A_DQSLN

A_DML

A_DMU

A_DQL0

A_DQL1

A_DQL3

A_DQL6

A_DQL5

A_DQL4

A_DQL2

A_DQL7

A_DQU1

A_DQU2

A_DQU3

A_DQU4

A_DQU5

A_DQU6

A_DQU7

A_DQU0

B_DQSUN

B_DQSL

B_DQSLN

B_DML

B_DMU

B_DQL0

B_DQL1

B_DQL3

B_DQL2

B_DQL6

B_DQL5

B_DQL4

B_DQL7

B_DQU2

B_DQU1

B_DQU0

C17

100n

16V

B_DQU6

B_DQU5

B_DQU4

B_DQU7

B_CSN

A_CSN

AB_A15

AB_WEN

B_DQSU

AB_CKN

AB_CKE

AB_RASN

AB_CASN

AB_BA0

AB_BA1

AB_BA2

AB_A12

AB_A13

AB_A14

AB_A11

AB_A8

AB_A9

AB_A10

AB_A7

AB_A4

AB_A5

AB_A6

AB_A2

AB_A3

AB_A1

AB_A0

C_DMU

C_DQSU

C_DQSUN

C_DQL0

C_DQU4

C_DQU3

C_DQL6

C_DQL5

C_DQL1

D_DQL1

D_DQL7

D_DQSLN

D_DQL2

D_DQL6

D_DQU0

D_DQU4

D_DQSUN

D_DQSU

D_DQU5

D_CSN

CD_A0

CD_A1

CD_A6

CD_A5

CD_A10

CD_A11

CD_BA0

CD_CASN

CD_ODT

CD_CK

CD_RESETN

CD_CKE

CD_CKN

CD_WEN

CD_A15

C_DQSLN

B_DQU3

CD_ODT

B_CSN

R6

B_DQL2

B_DQU7

B_DQU3

B_DMU

B_DQSL

B_DQSLN

B_DQSU

B_DQU0

B_DQU4

B_DQL3

B_DQL7

B_REF_DQ

TP89

DDR_VTT

1V5_VCC

16V

100n

C16

16V

100n

C15

10u

10V

C21

C22
10u
10V

10V
10u
C23

10V

10u

C24

16V
100n
C13

C14
100n
16V

AB_AVDD

10V

4u7

C25

R9

22R

100k

R28

U1

MP20073DH

5

6

7

8

2

1

DDQ

VTT

GND

VTTSEN

VTTREF

EN

REF

VDRV

H5TQ2G63BFR-PB

U3

A9

B3

E1

G8

J2

J8

M1

M9

P1

P9

T1

T9

B1

B9

D1

D8

E2

E8

F9

G1

G9

K1

D3

E7

C7

B7

G3

F3

A3

B8

A2

A7

C2

C8

C3

D7

H7

G2

H8

H3

F8

F2

F7

E3

M8

H1

B2

D9

G7

K2

K8

N1

N9

R1

R9

A1

A8

C1

C9

D2

E9

F1

H2

H9

L8

J9

L9

L1

J1

A0

A1

A2

A5

A6

A7

A10/AP

A11

A12/BC

NC1

NC2

NC3

NC4

NC6

BA0

CK_0

CK_1

CS

WE

RESET

ZQ

VDDQ_9

VDDQ_8

VDDQ_7

VDDQ_6

VDDQ_5

VDDQ_4

VDDQ_3

VDDQ_2

VDDQ_1

VDD_9

VDD_8

VDD_7

VDD_6

VDD_5

VDD_4

VDD_3

VDD_2

VDD_1

VREF_DQ

VREF_CA

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU4

DQU5

DQU6

DQU7

DQSL_0

DQSL_1

DQSU_1

DQSU_0

DML

DMU

ODT

VSSQ_9

VSSQ_8

VSSQ_7

VSSQ_6

VSSQ_5

VSSQ_4

VSSQ_3

VSSQ_2

VSSQ_1

VSS_12

VSS_11

VSS_10

VSS_9

VSS_8

VSS_7

VSS_6

VSS_5

VSS_4

VSS_3

VSS_2

VSS_1

B_CKE

B_CKN

B_CK

AB_RESETN

AB_WEN

A_CSN

AB_ODT

R5

240R

A_DQL6

A_DQL0

A_DQU7

A_DMU

A_DQU1

A_DQSLN

A_DQSU

A_DQU6

A_DQSUN

A_DQU2

A_DQL1

A_DQL7

A_DQL5

A_REF_DQ

AB_AVDD

H5TQ2G63BFR-PB

U2

A9

B3

E1

G8

J2

J8

M1

M9

P1

P9

T1

T9

B1

B9

D1

D8

E2

E8

F9

G1

G9

K1

D3

E7

C7

B7

G3

F3

A3

B8

A2

A7

C2

C8

C3

D7

H7

G2

H8

H3

F8

F2

F7

E3

M8

H1

B2

D9

G7

K2

K8

N1

N9

R1

R9

A1

A8

C1

C9

D2

E9

F1

H2

H9

L8

J9

L9

L1

J1

A3

A4

A8

A9

A13

NC1

NC4

NC5

NC6

BA1

BA2

CKE

RAS

CAS

ZQ

VDDQ_9

VDDQ_8

VDDQ_7

VDDQ_6

VDDQ_5

VDDQ_4

VDDQ_3

VDDQ_2

VDDQ_1

VDD_9

VDD_8

VDD_7

VDD_6

VDD_5

VDD_4

VDD_3

VDD_2

VDD_1

VREF_DQ

VREF_CA

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU4

DQU5

DQU6

DQU7

DQSL_0

DQSL_1

DQSU_1

DQSU_0

DML

DMU

ODT

VSSQ_9

VSSQ_8

VSSQ_7

VSSQ_6

VSSQ_5

VSSQ_4

VSSQ_3

VSSQ_2

VSSQ_1

VSS_12

VSS_11

VSS_10

VSS_9

VSS_8

VSS_7

VSS_6

VSS_5

VSS_4

VSS_3

VSS_2

VSS_1

AB_CASN

AB_RASN

AB_CKE

AB_CKN

AB_CK

AB_BA1

AB_BA2

AB_BA0

AB_A10

AB_A4

AB_A11

AB_A14

AB_A8

AB_A13

AB_A9

AB_A7

AB_A5

AB_A3

AB_A2

AB_A15

AB_A12

AB_A6

AB_A1

AB_A0

AB_CKN

AB_CK

R10

R11

22R

56R

R31

56R

R32

C29
10n
16V

AB_CK

AB_CKN

16V

C30

R45

1k

R129

4k7

B_CKE

AB_RESETN

AB_AVDD

1k

R169

AB_AVDD

R170

1k

10V

100n

C259

50V

1n

C383

B_REF_DQ

R171

1k

AB_AVDD

1k

10V

100n

C260

50V

1n

C384

H5TQ2G63BFR-PB

U4

A9

B3

E1

G8

J2

J8

M1

M9

P1

P9

T1

T9

B1

B9

D1

D8

E2

E8

F9

G1

G9

K1

D3

E7

C7

B7

G3

F3

A3

B8

A2

A7

C2

C8

C3

D7

H7

G2

H8

H3

F8

F2

F7

E3

M8

H1

B2

D9

G7

K2

K8

N1

N9

R1

R9

A1

A8

C1

C9

D2

E9

F1

H2

H9

L8

J9

L9

L1

J1

A0

A1

A2

A5

A6

A7

A10/AP

A11

A12/BC

NC1

NC2

NC3

NC4

NC6

BA0

CK_0

CK_1

CS

WE

RESET

ZQ

VDDQ_9

VDDQ_8

VDDQ_7

VDDQ_6

VDDQ_5

VDDQ_4

VDDQ_3

VDDQ_2

VDDQ_1

VDD_9

VDD_8

VDD_7

VDD_6

VDD_5

VDD_4

VDD_3

VDD_2

VDD_1

VREF_DQ

VREF_CA

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU4

DQU5

DQU6

DQU7

DQSL_0

DQSL_1

DQSU_1

DQSU_0

DML

DMU

ODT

VSSQ_9

VSSQ_8

VSSQ_7

VSSQ_6

VSSQ_5

VSSQ_4

VSSQ_3

VSSQ_2

VSSQ_1

VSS_12

VSS_11

VSS_10

VSS_9

VSS_8

VSS_7

VSS_6

VSS_5

VSS_4

VSS_3

VSS_2

VSS_1

R7

D_DQL2

D_DQU7

D_DQU3

D_DMU

D_DQSL

D_DQSLN

D_DQSU

D_DQU0

D_DQU4

D_DQL3

D_DQL7

D_REF_DQ

CD_AVDD

CD_A0

CD_A2

CD_A5

CD_A7

CD_A9

CD_A4

CD_A1

CD_A12

CD_A13

CD_A15

CD_A14

CD_A10

CD_A11

CD_A6

CD_A8

CD_BA1

CD_BA0

CD_BA2

D_CK

D_CKN

D_CKE

CD_RESETN

CD_RASN

CD_CASN

CD_WEN

D_CSN

240R

R8

CD_AVDD

C_REF_DQ

C_DQL5

C_DQL7

C_DQL1

C_DQU2

C_DQSUN

C_DQU6

C_DQSU

C_DQSLN

C_DQU1

C_DMU

C_DQU7

C_DQL0

C_DQL6

U5

H5TQ2G63BFR-PB

A9

B3

E1

G8

J2

J8

M1

M9

P1

P9

T1

T9

B1

B9

D1

D8

E2

E8

F9

G1

G9

K1

D3

E7

C7

B7

G3

F3

A3

B8

A2

A7

C2

C8

C3

D7

H7

G2

H8

H3

F8

F2

F7

E3

M8

H1

B2

D9

G7

K2

K8

N1

N9

R1

R9

A1

A8

C1

C9

D2

E9

F1

H2

H9

L8

J9

L9

L1

J1

A3

A4

A8

A9

A13

NC1

NC4

NC5

NC6

BA1

BA2

CKE

RAS

CAS

ZQ

VDDQ_9

VDDQ_8

VDDQ_7

VDDQ_6

VDDQ_5

VDDQ_4

VDDQ_3

VDDQ_2

VDDQ_1

VDD_9

VDD_8

VDD_7

VDD_6

VDD_5

VDD_4

VDD_3

VDD_2

VDD_1

VREF_DQ

VREF_CA

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU4

DQU5

DQU6

DQU7

DQSL_0

DQSL_1

DQSU_1

DQSU_0

DML

DMU

ODT

VSSQ_9

VSSQ_8

VSSQ_7

VSSQ_6

VSSQ_5

VSSQ_4

VSSQ_3

VSSQ_2

VSSQ_1

VSS_12

VSS_11

VSS_10

VSS_9

VSS_8

VSS_7

VSS_6

VSS_5

VSS_4

VSS_3

VSS_2

VSS_1

CD_A15

CD_ODT

CD_RASN

CD_CASN

CD_WEN

CD_A12

CD_BA2

CD_BA0

CD_A0

CD_A3

CD_A2

CD_A5

CD_A9

CD_A7

CD_A13

CD_RESETN

CD_CKN

CD_CK

CD_CKE

CD_A10

CD_BA1

CD_A4

CD_A1

CD_A6

CD_A11

CD_A8

CD_A14

C_CSN

CD_CK

CD_CKN

22R

R12

R13

CD_AVDD

CD_RESETN

R130

4k7

C31

16V

R46

1k

D_CKE

C32
10n
16V

R33

56R

56R

R34

CD_CK

CD_CKN

CD_AVDD

R173

1k

1k

R174

C261
100n
10V

C385

1n

50V

D_REF_DQ

C386

1n

50V

C262

10V

100n

R175

1k

1k

R176

CD_AVDD

DDR_VTT

10V

100n

R181
100R

R4

100n

10V

10V

100n

10V 100n

10V

100n

10V

100n

R182
100R

8

1

R1

R183
100R

R1

R2

R4

R184

R2

R3

R185
100R

5

4

R3

R4

100R

R186

R1

R227

100R

R228

100R

R229

AB_ODT

AB_A10

B_CK

AB_A7

AB_BA1

AB_A13

AB_BA2

AB_A11

AB_A6

AB_A8

AB_A14

AB_A15

AB_WEN

AB_A4

AB_A1

AB_A12

AB_A9

AB_BA0

AB_RASN

AB_CASN

R230

B_CKE

AB_RESETN

AB_A3

AB_A5

AB_A2

R231

B_CKN

10V 100n

10V

100n

CD_RESETN

R232

100R

R233

D_CKE

DDR_VTT

100n

10V

100R

R187

R1

R2

R3

10V 100n

10V

100n

10V 100n

10V 100n

100R

R188

8

1

R1

R2

R3

R4

100R

R189

R3

R4

100R

R190

R1

R4

100R

R191

5

4

R1

R2

R4

R192
100R

R2

R3

R4

R234

CD_ODT

CD_A10

CD_A0

CD_A7

CD_BA1

CD_A13

CD_BA2

CD_A11

CD_A6

CD_A8

CD_A14

CD_A15

CD_WEN

CD_A4

CD_A1

CD_A12

CD_A9

CD_BA0

CD_RASN

CD_CASN

CD_A3

CD_A5

CD_A2

D_CK

100R

R235

100R

R236

D_CKN

100n

10V

U6

MSD95M0D

C19

A20

B20

H28

K31

J29

K27

K30

J28

K32

H31

J32

G30

L30

J30

L29

G31

J31

M28

L28

L31

K28

N28

N27

L27

M27

M31

G32

N32

M30

G29

F32

T31

P30

T30

P31

U30

N31

U31

N30

R31

T32

R30

P27

U29

P28

U27

R28

V28

P29

U28

T28

T27

R27

AA31

W31

AA30

W32

AB31

V31

AB32

V30

W30

Y30

Y31

Y28

AB27

V27

AB29

W28

AB28

W27

AA27

Y27

AA28

Y29

D_DDR3_DQSUN

D_DDR3_DQSU

D_DDR3_DMU

D_DDR3_DQU7

D_DDR3_DQU6

D_DDR3_DQU5

D_DDR3_DQU4

D_DDR3_DQU3

D_DDR3_DQU2

D_DDR3_DQU1

D_DDR3_DQU0

D_DDR3_DQSLN

D_DDR3_DQSL

D_DDR3_DML

D_DDR3_DQL7

D_DDR3_DQL6

D_DDR3_DQL5

D_DDR3_DQL4

D_DDR3_DQL3

D_DDR3_DQL2

D_DDR3_DQL1

D_DDR3_DQL0

C_DDR3_DQSUN

C_DDR3_DQSU

C_DDR3_DMU

C_DDR3_DQU7

C_DDR3_DQU6

C_DDR3_DQU5

C_DDR3_DQU4

C_DDR3_DQU3

C_DDR3_DQU2

C_DDR3_DQU1

C_DDR3_DQU0

C_DDR3_DQSLN

C_DDR3_DQSL

C_DDR3_DML

C_DDR3_DQL7

C_DDR3_DQL6

C_DDR3_DQL5

C_DDR3_DQL4

C_DDR3_DQL3

C_DDR3_DQL2

C_DDR3_DQL1

C_DDR3_DQL0

D_DDR3_CSN

C_DDR3_CSN

CD_DDR3_CKN

CD_DDR3_CK

CD_DDR3_RESETN

CD_DDR3_CKE

CD_DDR3_ODT

CD_DDR3_WEN

CD_DDR3_CASN

CD_DDR3_RASN

CD_DDR3_BA2

CD_DDR3_BA1

CD_DDR3_BA0

CD_DDR3_A15

CD_DDR3_A14

CD_DDR3_A13

CD_DDR3_A12

CD_DDR3_A11

CD_DDR3_A10

CD_DDR3_A9

CD_DDR3_A8

CD_DDR3_A7

CD_DDR3_A6

CD_DDR3_A5

CD_DDR3_A4

CD_DDR3_A3

CD_DDR3_A2

CD_DDR3_A1

CD_DDR3_A0

B_DDR3_DQSUN

B_DDR3_DQSU

B_DDR3_DQU7

B_DDR3_DQU6

B_DDR3_DQU5

B_DDR3_DQU4

B_DDR3_DQU3

B_DDR3_DQU2

B_DDR3_DQU1

B_DDR3_DQU0

B_DDR3_DQSLN

B_DDR3_DQSL

B_DDR3_DML

B_DDR3_DQL7

B_DDR3_DQL6

B_DDR3_DQL5

B_DDR3_DQL4

B_DDR3_DQL3

B_DDR3_DQL2

B_DDR3_DQL1

B_DDR3_DQL0

A_DDR3_DQSUN

A_DDR3_DQSU

A_DDR3_DQU7

A_DDR3_DQU6

A_DDR3_DQU5

A_DDR3_DQU4

A_DDR3_DQU3

A_DDR3_DQU2

A_DDR3_DQU1

A_DDR3_DQU0

A_DDR3_DQSLN

A_DDR3_DQSL

A_DDR3_DQL7

A_DDR3_DQL6

A_DDR3_DQL5

A_DDR3_DQL4

A_DDR3_DQL3

A_DDR3_DQL2

A_DDR3_DQL1

A_DDR3_DQL0

A_DDR3_CSN

AB_DDR3_CKN

AB_DDR3_CK

AB_DDR3_RESETN

AB_DDR3_CKE

AB_DDR3_ODT

AB_DDR3_WEN

AB_DDR3_CASN

AB_DDR3_RASN

AB_DDR3_BA2

AB_DDR3_BA1

AB_DDR3_BA0

AB_DDR3_A15

AB_DDR3_A14

AB_DDR3_A13

AB_DDR3_A12

AB_DDR3_A11

AB_DDR3_A10

AB_DDR3_A7

AB_DDR3_A6

AB_DDR3_A2

AB_DDR3_A1

1

AB_A0

AB_A1

AB_A6

AB_A12

AB_A15

AB_A2

AB_A3

AB_A5

AB_A7

AB_A9

AB_A13

AB_A8

AB_AVDD

100n

16V

C2287

100n
16V

C2288

C2289

100n

C2290
100n
16V

C2291

100n

C2292
100n
16V

CD_AVDD

100n
16V

C2293

AB_A14

AB_A11

AB_A4

C2294

100n

AB_A10

AB_BA0

AB_BA2

AB_BA1

AB_RASN

AB_CASN

AB_WEN

AB_RESETN

AB_ODT

100n

16V

C2295

C2296

100n

100n
16V

C2297

C2298

100n

C2303

100n

100n
16V

C2304

C2305

100n

100n

C2306

100n
16V

C2307

10V 100n

100n

10V

10V 100n

100n

10V 100n

100n

10V

10V 100n

100n

10V

10V 100n

10V 100n

100n

10V

10V 100n

100n

10V

10V 100n

100n

10V

10V 100n

100n

10V

10V 100n

100n

10V

10V 100n

AB_CKE

CD_CKE

S311

S312

S313

S314

DDR TERMINATION

for STR

for STR

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Summary of Contents for MB120 DS

Page 1: ...MB120 DS SERVICE MANUAL...

Page 2: ...0 6 2Gb DDR3 SDRAM 32 Hynix H5TQ2G63GFR 32 7 4Gb DDR3L SDRAM 33 Hynix H5TQ4G63GFR 33 8 32GBIT 4G X 8 BIT NAND FLASH MEMORY 35 MT29F4G08ABAEAWP 35 9 16M BIT 16M x 1 CMOS SERIAL FLASH EEPROM 37 A MX25L1...

Page 3: ...ce AV CODEC and CPU This IC also supports 4K2K UHD Key features includes Combo Front End Demodulator A multi standart A V format decoder The MACEpro video processor Home theatre sound processor Intern...

Page 4: ...3 1 Dsub9 RS232 1 RJ45 10 100 Support Ethernet 1 RJ12 for service only Tuner ATV DVB T T2 C optional 4K2K 50 100Hz Vby1 FHD 50 100Hz LVDS interface 2 MICROCONTROLLER MSTAR MSD95M0D General Description...

Page 5: ...4 Features...

Page 6: ...5...

Page 7: ...6...

Page 8: ...7...

Page 9: ...8...

Page 10: ...9 Table 1 Recommended operating conditions Table 2 Absolute Maximum Ratings...

Page 11: ...10 3 VIDEO BACK END PROCESSOR MSTAR MST7410FE General Description Table 3 Recommended operating conditions...

Page 12: ...11 Features...

Page 13: ...12 Block Diagram Figure 1 Block diagram...

Page 14: ...and 128kHz 176 4kHz 192kHz System clock 64x 128x 256x 384x 512x 768x 1024x Fs 256x 1024x Fs for 32kHz 44 1kHz 48kHz 128x 512x Fs for 64kHz 88 2kHz 96kHz 64x 256x Fs for 128kHz 176 4kHz 192kHz Supply...

Page 15: ...14 Figure 2 Pin description Figure 3 Functional Block Diagram Table 4 Absolute Maximum Ratings...

Page 16: ...on to prevent POP noise Build in shutdown control and de pop control sequence also help AD22657B to be a pop less device The AD22657B is available in a 10 pin MSOP package Features Operation Voltage 3...

Page 17: ...16 Figure 4 Pin description Table 6 Pin functions Table 7 Recommended operating conditions C SUBWOOFER PREAMPLIFIER U30 AD22657B is used for subwoofer out as well...

Page 18: ...and options Power socket is used for taking voltages which are 12V 5V and VDD_Audio These voltages are produced in power board Also socket is used for giving dimming backlight and standby signals with...

Page 19: ...ous end equipment power bus regulators with a cost effective low component count low standby current solution The main control loop for the TPS54528 uses the D CAP2 mode control that provides a fast t...

Page 20: ...nge 0 76 V to 6 V Highly Efficient Integrated FETs Optimized for Lower Duty Cycle Applications 65 mOhm High Side and 36 mOhm Low Side High Efficiency less than 10 mikroAmper at shutdown High Initial B...

Page 21: ...ra low ESR ceramic capacitors The device operates from 4 5 V to 18 V VIN input The output voltage can be programmed between 0 76 V and 7 V The device also features an adjustable soft start time The TP...

Page 22: ...21 Table 10 Recommended operating conditions Figure 8 Pin Description Table 11 Pin functions...

Page 23: ...rent limit which prevents current runaway There is also a low side sinking current limit which turns off the low side MOSFET to prevent excessive reverse current Hiccup protection will be triggered if...

Page 24: ...23 Table 12 Recommended operating conditions Figure 9 Pin Description...

Page 25: ...tra low ESR ceramic capacitors with no external compensation components TPS563200 operate in Advanced Eco mode which maintains high efficiency during light load operation The devices are available in...

Page 26: ...ations Digital TV Power Supply High Definition Blu ray Disc Players Networking Home Terminal Networking Home Terminal Table 14 Recommended operating conditions Figure 10 Pin Description Table 15 Pin f...

Page 27: ...een optimized for power management applications requiring a wide range of gate drive voltage ratings 4 5V 20V Features 8 2 A 40 V RDS ON 0 027 VGS 10 V RDS ON 0 035 VGS 4 5 V Fast switching speed High...

Page 28: ...High Speed Soft Recovery Avalanche Energy Specified IDSS Specified at Elevated Temperature Pb Free Package is Available Applications Power Management in portable and battery powered products i e compu...

Page 29: ...ns of thermal shutdown and current limit protect the device against thermal and current over loads A POK indicates that the output voltage status with a delay time set internally It can control other...

Page 30: ...l Shutdown with Hysteresis Open Drain VOUT Voltage Indicator POK Low Shutdown Quiescent Current 30mA Shutdown Enable Control Function Simple SOP 8P Package with Exposed Pad Lead Free and Green Devices...

Page 31: ...he AP2111 has built in auto discharge function The AP2111 features low power consumption The AP2111 is available in SOIC 8 PSOP 8 SOT 223 and SOT 23 5 packages Features Output Voltage Accuracy 1 5 Out...

Page 32: ...31 Applications LCD Monitor Portable DVD Laptop computer Figure 14 Pin configuration Table 20 Recommended operating conditions Table 21 Pin description...

Page 33: ...quires large memory density and high bandwidth SK Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock While all addresses and control inpu...

Page 34: ...provides backward compatibility with the 1 5V DDR3 based environment without any changes SK Hynix 4Gb DDR3L SDRAMs offer fully synchronous operations referenced to both rising and falling edges of th...

Page 35: ...34 Table 23 Absolute Maximum DC Ratings Table 24 Recommended operating conditions...

Page 36: ...ion and monitor device status R B This hardware interface creates a low pin count device with a standard pinout that remains the same from one density to another enabling future upgrades to higher den...

Page 37: ...36 Figure 15 Functional block diagram Table 25 DC Characteristics and Operating Conditions 3 3V...

Page 38: ...Vcc 1V Performance High Performance Fast access time 86MHz serial clock Serial clock of Dual Output mode 80MHz Fast program time 1 4ms typ and 5ms max page Byte program time 9us typical Fast erase tim...

Page 39: ...Serial access to the device is enabled by CS input When it is in Dual Output read mode the SI and SO pins become SIO0 and SIO1 pins for data output The device provides sequential read operation on who...

Page 40: ...1 IO2 IO3 Software Hardware Reset Highest Performance Serial Flash 104MHz Single Dual Quad SPI clocks 208 416Mhz equivalent Dual Quad SPI 50 MB S continuous data transfer rate More than 100 000 erase...

Page 41: ...e and 1uA for power down All devices are offered in space saving packages The W25Q32FV array is organized into 16 384 programmable pages of 256 bytes each Up to 256 bytes can be programmed at a time P...

Page 42: ...ongle The STDP4320 uses MegaChips latest generation DisplayPort dual mode receiver and transmitter technology that supports both DisplayPort and TMDS signal formats This device receives MST format up...

Page 43: ...e HBR2 HBR RBR SST or MST up to eight streams 1 2 or 4 lanes AUX CH 1 Mbps HPD out HDMI DVI operation 3 2 Gbps link rate Functions as eDP and MyDP receiver DisplayPort dual mode transmitters Two trans...

Page 44: ...ports HDCP 1 4 to HDCP 2 2 and HDCP 2 2 to HDCP 1 4 conversions Figure 18 Pin Configuration Features On chip HDMI Receiver and Transmitter core which are compliant with DVI 1 0 HDMI 1 4b and HDMI 2 0a...

Page 45: ...2 Controller for Explore HDMI 2 0 chips which has HDCP 2 2 function It can handle the HDCP 2 2 authentication and ALU calculation for both HDCP 2 2 RX or TX The EPF025R also provide the miscellaneous...

Page 46: ...BUS0 Master can support up to 1 5MHz clock rate On chip USB 1 1 host slave which supports end pint 0 1 2 and 64 byte bulk transfer On chip 4 Timers supporting Timer Pulse Output Event Counter and Puls...

Page 47: ...the display panel thru a single and standard interfacing based on the 80 pin JAE plug and receptacle connectors The power supply to the Pluggable Module together with the defined feature interfaces ar...

Page 48: ...E representative The 80 pin right angle blind mate plug connector p n TX25 80P LT H1E and its receptacle p n TX24 80R LT H1E provide interfacing for the following features Power DC IN 12V 19V 8A max D...

Page 49: ...48 Pin Assignment Table 28 Pin Assignment...

Page 50: ...49 Figure 23 Compatible OPS Connector Pin Layout...

Page 51: ...50 13 TUNER OPTIONAL M88TS2022 SATELLITE TUNER Features and General Description Pin Assigment...

Page 52: ...51 Absolute Maximum Ratings and Recommended Operating Conditions...

Page 53: ...52 14 DEMODULATOR STAGE OPTIONAL A MSB1246 DVB T2 Features...

Page 54: ...d can accept tuners that provide zero IF output A high rejection channel filter has been included easing the channel filtering requirement of the tuner whilst still meeting the stringent requirements...

Page 55: ...54 Pinning...

Page 56: ...nt count low power dissipation together with simple design and I2C standard interfacing TPS65233 features high power efficiency The boost converter integrates a 120 m power MOSFET running at 500 kHz s...

Page 57: ...tion adjustment from 63 ppm to 126 ppm The bq32000 registers include an OF oscillator fail flag indicating the status of the RTC oscillator as well as a STOP bit that allows the host processor to disa...

Page 58: ...K button in remote control power on and wait TV will power up itself 4 If First Time Installation screen comes it means software update procedure is successful B DISPLAYPORT FW UPDATE Please follow DP...

Page 59: ...7 Finally restart the DS product If you see fail please reset monitor and try program again 18 TROUBLESHOOTING A NO BACKLIGHT PROBLEM Problem If product is working led is normal and there is no pictu...

Page 60: ...59 Dimming pin should be high or square wave in open position If it is low please check S97 for Mstar side and panel or power cables connectors...

Page 61: ...60 Backlight power supply should be in panel specs Please check Q44 shown below also it can be checked TP175 STBY_ON OFF_NOT should be low for tv on condition please check Q23 s collector...

Page 62: ...indicates a short on Vcc voltages Protect pin should be logic high while normal operation When there is a short circuit protect pin will be logic low If you detect logic low on protect pin unplug the...

Page 63: ...62 C IR PROBLEM Problem Extender LED or IR not working Check Extender LED IR card supply on 17MB120DS chasis...

Page 64: ...63 D KEYPAD TOUCHPAD PROBLEMS Problem Keypad or Touchpad is not working Check keypad supply on MB120...

Page 65: ...64 E USB PROBLEMS Problem USB is not working or no USB Detection Check USB Supply It should be nearly 5V Also USB Enable should be logic high For USB 3 0 ports For Side USB 2 0 port...

Page 66: ...oltage meter Also there may be a problem about SW Try to update TV with latest SW Additionally it is good to check SW printouts via Teraterm These printouts may give a clue about the problem You can u...

Page 67: ...66 Problem No signal in TV mode Check tuner supply voltage 3V3_TUNER and Check tuner options are correctly set in Service menu Check voltage at TUNER_SCL and TUNER_SDA pin of tuner...

Page 68: ...67 I REAL TIME CLOCK PROBLEM Problem Date Time Failure Check RTC supply voltage 3V3_STBY Also there may be a problem about backup supply Please check voltage level of C2503...

Page 69: ...ellite Tuner DVI HDMI3 DSUB9 Optic TI TPS65233 LNB G6F HDMI NAND 512MB NAND DDR3 DDR3 DDR3 DDR3 DDR3 LineIn CVBS YPbPr LineOut Ethernet RJ12 Optic SubwOut SPDIF POWER BLOCK REGULATORS STEPDOWNS ETC LV...

Page 70: ...2 1 2 5V_VCC 5V_VCC R132 4k7 1 2 C548 10u 10V 470R R705 10k R695 F51 60R 1 2 3V3_VCC TP297 C2309 6V3 22u 5V_STBY 3V3_STBY 10u C2308 10V 4k7 R133 10k R373 1 2 3V3_STBY S119 C442 100n 16V STBY_ON OFF ST...

Page 71: ...22u C687 22u 16V C715 R326 10k 1 2 U43 RT6213BHGJ6F 1 2 3 6 5 4 FB EN BOOT VIN LX GND C716 16V 22u C426 16V 100n 5V_STBY 12V_VCC WOWL_EN G6F_CPU_FB CORE_VID1 1k R801 2N7002 Q52 G6F_CORE_FB 2p 50V C87...

Page 72: ...2 E8 F9 G1 G9 K1 D3 E7 C7 B7 G3 F3 A3 B8 A2 A7 C2 C8 C3 D7 H7 G2 H8 H3 F8 F2 F7 E3 M8 H1 B2 D9 G7 K2 K8 N1 N9 R1 R9 A1 A8 C1 C9 D2 E9 F1 H2 H9 L8 T2 L3 K3 J3 L2 K9 K7 J7 M3 N8 M2 J9 T7 L9 M7 L1 J1 T3...

Page 73: ...H_DP TP227 S822 S823 USB1_DP USB1_DN S5 S9 USB_HUB_DP_1 S14 USB_BT_DN S23 USB_BT_DP USB_HUB_DN USB_HUB_DP USB_HUB_DN_1 3V3_NAND USB_HUB_DP_1 S807 S808 USB_TCH_SOC_DN USB_TCH_SOC_DP USB_HUB_DP_1 VCC_EM...

Page 74: ...TP8 TP9 TP10 TP14 TP16 1k R35 50V 27p C748 27p 50V C749 S41 S42 G6F_XIN G6F_XOUT G6F_XOUT G6F_RESET 1N4148 D10 3V3_STBY 10V 100n C95 10k R276 D22 NUP4004M5 5 4 3 2 1 G6F_RESET C750 27p 50V C752 27p 50...

Page 75: ...U18 U20 U26 V1 V8 V9 V10 V11 V12 V13 V14 V15 V16 V20 V21 V22 V26 V29 V32 W3 W8 GND200 GND199 GND198 GND197 GND196 GND195 GND194 GND193 GND192 GND191 GND190 GND189 GND188 GND187 GND186 GND185 GND184 GN...

Page 76: ...S74 S75 TX_G6F S77 S78 TP74 TP75 S91 BACKLIGHT_ON OFF TX_HOTEL RX_HOTEL AMP_MUTE CPU_VID1 CPU_VID0 33R R424 BACKLIGHT_DIM TP87 1k R37 S101 220p 50V C821 1 2 S102 C873 10u 16V R180 100R 1 2 3 4 5 6 7...

Page 77: ...YNC_D1 TS_CLK_D1 TS4CLK TS4D0 TS4VLD TS4SYNC U54 TPS65233 13 14 15 16 9 10 11 12 8 7 6 5 4 3 2 1 LX VIN VCC AGND TCAP ISEL EN ADDR FAULT EXTM VCTRL SDA SCL VADJ PGND BOOST VCP VLNB 12V_VCC S425 C996 2...

Page 78: ...R683 15R C746 68n 50V R825 1M 4k7 R109 RESET_DEMOD FB1 1 2 3 VIN VCC GND D29 C5V6 F140 330R TP48 TP49 S47 SPDIF_OUT_COAXIAL 50V 220p C819 1 2 TP50 R200 100R 1 2 SPDIF_OUT AMP_MUTE R286 10k 5V_SPDIF 1...

Page 79: ...I2C_S_SDA XTAL_I XTAL_O RESET 5 TP240 100R R208 47k R497 1V_G6F_CPU 47k R498 100R R209 1V_G6F_CORE D20 BAW56 TP249 TP250 TP253 MFC_SPI_SCZ_1 TP177 MFC_SPI_SDO_1 MFC_SPI_SDI_1 MFC_SPI_SCK_1 MFC_SPI_SC...

Page 80: ...V 100n C71 MFC_AVDDL_DVI 60R F7 10V 100n C73 10u 6V3 C612 100n C74 10V 100n C75 10V MFC_AVDDL_HDMI_TX C76 100n 10V MFC_AVDD_HDMI_TX 10V C77 100n C78 10V 100n 10V 100n C79 MFC_AVDD_DVI F8 60R 50V 100n...

Page 81: ...z LVA2N_100Hz LVA1P_100Hz LVA1N_100Hz LVA0P_100Hz LVA0N_100Hz TP352 TP353 TP354 TP355 TP356 TP357 TP358 TP359 TP360 TP361 TP362 TP363 VBY_12N S393 S394 S395 S396 S397 S398 S399 S400 S401 S402 S403 S40...

Page 82: ...1k R50 3V3_VCC C566 1u 10V S118 ARC ARC S120 U6 MSD95M0D T2 T3 U1 V2 V3 W2 R1 R2 R6 T5 Y2 U4 L1 M2 M3 N2 P2 P1 K2 K3 L4 L5 M4 M5 D2 D3 E2 E3 F2 F1 C3 D1 H6 H5 K6 J6 G2 G3 H2 H3 J2 J1 F3 G1 J4 K5 H4 J...

Page 83: ...P5 P6 P7 P9 P11 P12 P13 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31 P32 R1 R2 R3 R4 R5 R9 R10 R11 R12 R13 R21 R22 R23 R24 R27 R28 R30 R31 T3 T4 T5 T6 T7 T8 T9 T10 T12 T13 T14 T21 T22 T23 T24 T27 T28 T29...

Page 84: ...TX00 TX00 TX_AVDD_3 TXC0 TXC0 AVSS_11 AVSS_10 TX_PVDD_2 100n C2622 TXB_HPD HDMIC_HPD S876 D87 AZ1045 04F 10 9 7 6 5 4 3 2 1 P1 P2 GND P4 P5 NC1 NC2 NC3 NC4 AZ1045 04F D88 10 9 7 6 5 4 3 2 1 P1 P2 GND...

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