VESTEL MB120 DS, Service Manual

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8. 32GBIT (4G X 8 BIT) NAND FLASH MEMORY
MT29F4G08ABAEAWP
Key Features
Description
Micron NAND Flash devices include an asynchronous data interface for high-performance I/O operations.
These devices use a highly multiplexed 8-bit bus (I/Ox) to transfer commands, address, and data. There are five
control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional
signals control hardware write protection and monitor device status (R/B#).
This hardware interface creates a low pin-count device with a standard pinout that remains the same from
one density to another, enabling future upgrades to higher densities with no board redesign. A target is the unit
of memory accessed by a chip enable signal.
A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can
independently execute commands and report status. A NAND Flash die, in the ONFI specification, is referred
to as a logical unit (LUN). There is at least one NAND Flash die per chip enable signal. For further details, see
Device and Array Organization.