27
Circuit Description
Reception and transmission are switched by
"RX5V" and "TX5V" lines from the microproces-
sor unit (MPU). The receiver uses double-conver-
sion superheterodyne circuitry, with a 44.3 MHz
1st IF and 455 kHz 2nd IF. The 1st LO, produced
by a PLL synthesizer, yields the 44.3 MHz 1st IF.
The 2nd LO uses a 43.845 MHz (44.3 MHz-455
kHz) signal generated by a crystal oscillator. The
2nd mixer and other circuits use a custom IC to
convert and amplify the 2nd IF, and detect FM
to obtain demodulated signals. During transmit,
the PLL synthesizer oscillates at the desired fre-
quency directly, for amplification to obtain RF
power output. During transmit, voice modula-
tion and CTCSS (or DCS) modulation are ap-
plied to this synthesizer. Transceiver functions,
such as tx/rx control, PLL synthesizer settings,
and channel programming, are controlled using
the MPU.
Receiver
Incoming RF signals from the antenna connec-
tor are delivered to the MAIN Unit, and pass
through a low-pass filter (LPF) consisting of coils
L2001, L2002, L2004, and L2024, capacitors
C2002, C2004, C2009, C2111, C2112, C2113, and
C2114, and antenna switching diodes D2001,
D2002, and D2013 to the receiver front end.
The signal is then band-pass filtered and ampli-
fied by Q2001 (
2C3356
). The signals are then fed
t o t h e i n p u t o f t h e 1 s t m i x e r , Q 2 0 0 4
(
SGM2016AM
), where they are mixed with the
1st local signal from the PLL. The 44.3 MHz 1st
mixer product then passes through monolithic
crystal filters XF2001 and XF2002, and is ampli-
fied by Q2010 (
2SC2714Y
) and delivered to the
i n p u t o f t h e F M s u b s y s t e m I C Q 2 0 1 3
(
MC3372ML
). This IC contains the 2nd mixer, a
local oscillator, limiter amplifier, FM detector,
and audio amplifier. The 2nd LO in the IF-IC is
produced from crystal X2002 (43.845 MHz), and
the 1st IF is converted to 455 kHz by the 2nd
mixer and stripped of unwanted components by
ceramic filters CF2001 and CF2002. After pass-
ing through a limiter amplifier, the signal is de-
modulated by the FM detector.
Demodulated receive audio from the IF-IC is
amplified by Q1005 (
NJM2902M
). After volume
adjustment by VR1010, the audio signal is am-
plified by the AF power amplifier Q1003
(
LA4425A
) and passed to the speaker jack.
PLL synthesizer
The 1st LO maintains stability from the PLL syn-
thesizer by using a 12.8 MHz reference signal
from crystal X2001. PLL synthesizer IC Q2009
(
MC145191
F
) consists of a prescaler, reference
counter, swallow counter, programmable
counter, a serial data input port to set these
counters based on the external data, a phase
comparator, and charge pump.
The PLL-IC divides the 12.8 MHz reference sig-
nal by 1,280 using the reference counter (10.0
kHz comparison frequency). The VCO output
is divided by the prescaler, swallow counter and
programmable counter. These two signals are
compared by the phase comparator and applied
to the charge pump. A voltage proportional to
their phase difference is delivered to the low-
pass filter circuit, then fed back to the VCO as
an error-correcting voltage, controlling and sta-
bilizing the oscillating frequency.
The VCO is comprised of Q2008 (
2SC3356
) and
D2003 (
HVU350
), and oscillates at 44.3 MHz dur-
ing receive, and at the fundamental frequency
during transmit, with direct frequency-modu-
lation using varactor diode D2004 (
HVU350
).
The VCO output passes through buffer amplifi-
er Q2011 (
2SC3356
), and a portion is fed to the
PLL IC, and at the same time amplified by Q2016
(
2SC3356
) to obtain stable output. The VCO DC
supply is regulated by Q2017 (
2SC2812
). Syn-
thesizer output is fed to the 1st mixer by diode
switch D2010 (
1SS184
) during receive, and to
drive amplifier Q2015 (
µPC2710
) for transmit.
The reference oscillator feeds the PLL synthe-
sizer, and is composed of crystal X2001 (12.8
Summary of Contents for VXR-1000
Page 26: ...26 Block Diagram ...
Page 37: ...37 Main Unit Lot 3 Circuit Diagram ...
Page 38: ...38 Main Unit Lot 3 ...
Page 53: ...53 ...
