Multi-purpose I/O
VL-EPU-4460 Reference Manual
35
The table below lists the pinout of the SPX connector.
Table 9. SPX Connector Pinout
Pin
Signal
Function
1
VCC
+5.0 V
2
SCLK
SPX Clock
3
GND
Ground
4
MISO
Master input, Slave output
5
GND
Ground
6
MOSI
Master output, Slave input
7
GND
Ground
8
SS0#
Chip Select 0
9
SS1#
Chip Select 1
SPI is, in its simplest form, a three wire serial bus. One signal is a clock, driven only by the
permanent master device on-board. The others are Data In and Data Out with respect to the
master. The SPX implementation on the Condor supports chip selects. The master device
initiates all SPI transactions. A slave device responds when its chip select is asserted and it
receives clock pulses from the master. All four common SPI modes are supported through the use
of clock polarity and clock idle state controls.
The SPI clock is derived from a 24 MHz PCI clock and can be software-configured to operate at
the following frequencies:
6 MHz (24 MHz/4)
3 MHz (24MHz/8)
1.5 MHz (24MHz/16)
0.75 MHz (24MHz/32)
Cabling
An adapter cable, part number CBR-0901, is available. This is a 9-inch, 9-pin Pico-Clasp to Dual
SPX cable.
If your application requires a custom cable, the following information will be useful:
EPU-4460 Board Connector
Mating Connector
Molex 501568-0907
Molex 501330-0900
