VersaLogic VL-EPU-4011 Reference Manual Download

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System Setup

VL-EPU-4011 BIOS Reference Manual

Details: Delay between subsequent VR ramp ups if they are all Turn ON at the same
time

Option: PCIE Slot 5 Device Power-on delay in ms

Minimum = 0x00

Maximum = 0x64

Default = 0x64

Details: Delay between applying core power and Deasserting PERST#

Option: PCIE Slot 5 Device Power-off delay in ms

Minimum = 0x00

Maximum = 0x0A

Default = 0x0A

Details: Delay after removing Core power

Option: Audio Delay

Minimum = 0x0000

Maximum = 0x03E8

Default = 0x00C8

Details: Delay after applying power to HD Audio(Realtek) codec device.

Option: I2C0 Controller

Minimum = 0x0000

Maximum = 0x03E8

Default = 0x0000

Details: Delay in _PS0 I2C0 Controller.

Option: SensorHub

Minimum = 0x0000

Maximum = 0x03E8

Default = 0x0044

Details: Delay after applying power to SensorHub device.

Summary of Contents for VL-EPU-4011

Page 1: ...BIOS Reference Manual REV May 2020 Harrier VL EPU 4011 A credit card sized system featuring error correcting memory ECC TPM security dual or quad core Apollo Lake processor and plenty of on board I O...

Page 2: ...nsure this document is error free VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for any...

Page 3: ...arise The quantity of items being returned The model and serial number barcode of each item A detailed description of the problem Steps you have taken to resolve or recreate the problem The return sh...

Page 4: ...rd should also be protected inside a closed metallic antistatic envelope during shipment or storage Note The exterior coating on some metallic antistatic bags is sufficiently conductive to cause exces...

Page 5: ...LPSS Configuration 30 System Setup South Cluster Configuration PCI Express Configuration 35 System Setup PCI Express Root Port 1 6 36 System Setup South Cluster Configuration SATA Drives Chipset SATA...

Page 6: ...81 VersaLogic Features PCI IRQ Routing Configuration 86 IPv4 Network Configuration 89 IPv6 Network Configuration 89 IPv6 Network Configuration IPv6 Current Setting 89 Figures Figure 1 The Harrier VL E...

Page 7: ...ne inch thick the Harrier is a member of VersaLogic s family of small ultra rugged embedded x86 computers Equipped with a powerful dual or quad core Intel Apollo Lake processor and soldered on ECC RAM...

Page 8: ...s and a microSD socket provide a range of data storage options Dual Mini PCIe sockets accommodate plug in A D Wi Fi modems GPS receivers MIL STD 1553 Ethernet Firewire and other mini cards The Harrier...

Page 9: ...ecution Units EPU 4011 EAP Turbo Boost Supports DirectX 12 OpenGL 4 4 Quick Sync Video Clear Video HD Technology Clear Video Technology VP8 VP9 MPEG2 H 264 H 265 and VC1 Fanless operation Fanless oper...

Page 10: ...ation Current Setting The following table lists the function keys available for menu screens Table 2 BIOS Setup Program Function Keys Key Function Key Function or Selects a different menu screen Moves...

Page 11: ...Option CSM Support No Yes default Details Compatibility Support Module that provide backward compatibility services for legacy BIOS services like int10 int13 dependent OS Option Quick Boot Disabled de...

Page 12: ...keyboard in setup or a USB biometric scanner such as a finger print reader to control access to setup but does not prevent the operating system from supporting such hardware Option USB Legacy Disable...

Page 13: ...hod for UCR None No flow control RTS CTS Harware flow control XON XOFF Software flow control Option Continue C R after POST Disabled Enabled default Details Enables Console Redirection after OS has lo...

Page 14: ...for non UEFI boot mode Legacy Boot Some legacy software such as DUET requires that the BIOS explicitly enter text video mode prior to boot Option Load OPROM All On Demand default Details Load all OPR...

Page 15: ...p System Setup CPU Configuration Option Bi directional PROCHOT Disable Enable default Details When a processor thermal sensor trips either core the PROCHOT will be driven If bi direction is enabled ex...

Page 16: ...ermal Sensor Option Active Processor Cores Disable default Enable Details Enable this to disable core in each processor package Option Core 0 Enable default Details Core 0 Enable Option Core 1 Disable...

Page 17: ...R SpeedStep tm Disable Enable default Details Allows more than two frequency ranges to be supported Option Boot performance mode Max Performance default Max Battery Details Select the performance sta...

Page 18: ...lt PC2 C0 Details This option controls the Max Package C State that the processor will support Option Max Core C State Fused value default Core C10 Core C9 Core C8 Core C7 Core C6 Core C1 Unlimited De...

Page 19: ...t Details Enable Disable Power Limit 1 Option Power Limit 1 Clamp Mode Disabled Enabled default Details Enable Disable Power Limit 1 Clamp Mode Option Power Limit 1 Power Auto default 6 7 8 23 24 25 D...

Page 20: ...tup Uncore Configuration GOP Configuration Option GOP Driver Enable default Disable Details Enable GOP Driver will unload VBIOS Disable it will load VBIOS Option Intel Graphics Pei Display Peim Enable...

Page 21: ...seconds after power enable Option HG Delay After Hold Reset Minimum 0x0000 Maximum 0x03E8 Default 0x0064 Details Delay in milli seconds after hold reset Option RC6 Render Standby Enable default Disab...

Page 22: ...ct DVMT 5 0 Pre Allocated Fixed Graphics Memory size used by the Internal Graphics Device Option DVMT Total Gfx Mem 128M 256M default MAX Details Select DVMT5 0 Total Graphic Memory size used by the I...

Page 23: ...Enable Disable GT PM Support Option PAVP Enable Enable default Disable Details Enable Disable PAVP IGD LCD Control Option IGD Flat Panel Disabled Auto 800 x 480 EDID 0 800 x 600 EDID 1 1024 x 768 EDI...

Page 24: ...IGD display interface used when system boots Option Panel Scaling Auto default Centering Stretching Details Memory Configuration Option Memory Scrambler Enable default Disable Details Enable Disable...

Page 25: ...Option HD Audio CSME Memory Transfers VC0 default VC2 Details Set HD Audio CSME Memory Transfers to VC0 VC2 Option HD Audio Host Memory Transfers VC0 default VC2 Details Set HD Audio Host Memory Trans...

Page 26: ...k Frequency 6 MHz 12 MHz 24 MHz default Details Selects HD Audio Link frequency Applicable only if HDA codec supports selected frequency Option iDisplay Link Frequency 48 MHz 96 MHz default Details Se...

Page 27: ...ock Trunk Disable Enable default Details Enable Disable GMM Clock Gate PGCB Clock Trunk Option GMM Clock Gate Sideband Disable Enable default Details Enable Disable GMM Clock Gate Sideband Option GMM...

Page 28: ...DMA Engine Option GMM Clock Gate Register Access Disable Enable default Details Enable Disable GMM Clock Gate Register Access Option GMM Clock Gate Host Interface Disable Enable default Details Enable...

Page 29: ...ble default Enable Details Enable Disable GMM Power Gate D3 Hot Option GMM Power Gate I3 Hot Disable default Enable Details Enable Disable GMM Power Gate I3 Option GMM Power Gate PMC Request Disable d...

Page 30: ...Details Enable Disable LPSS I2C 1 Support Option Set LPSS I2C 1 Speed Standard Mode Fast Mode default Fast Plus Mode High Speed Mode Details Select LPSS I2C 1 Speed Option LPSS I2C 2 Support D22 F1 D...

Page 31: ...lt PCI Mode ACPI Mode Details Enable Disable LPSS I2C 4 Support Option Set LPSS I2C 4 Speed Standard Mode Fast Mode default Fast Plus Mode High Speed Mode Details Select LPSS I2C 4 Speed Option LPSS I...

Page 32: ...efault Fast Plus Mode High Speed Mode Details Select LPSS I2C 6 Speed Option LPSS I2C 7 Support D23 F2 Disable default PCI Mode ACPI Mode Details Enable Disable LPSS I2C 7 Support Option Set LPSS I2C...

Page 33: ...efault PCI Mode ACPI Mode Details Enable Disable LPSS HSUART 1 Support Option LPSS HSUART 2 Support D24 F1 Disable default PCI Mode ACPI Mode Details Enable Disable LPSS HSUART 2 Support Option LPSS H...

Page 34: ...Gating Configuration Option LPSS I2C 1 Clock Gating Configuration Disable Enable default Details Enable Disable LPSS I2C 1 Clock Gating Option LPSS I2C 2 Clock Gating Configuration Disable Enable defa...

Page 35: ...ort Option Port8xh Decode Disabled default Enabled Details PCI Express Port8xh Decode Enable Disable Option Port8xh Decode Port Minimum 0x00 Maximum 0x14 Default 0x00 Details Select PCI Express Port8x...

Page 36: ...automatically for the most optimum power savings Enable Enable PCIe root port Disable Disable PCIe root port Option ASPM Disable L0s default L1 L0sL1 Auto Details PCI Express Active State Power Manag...

Page 37: ...porting Enable Disable Option NFER Disable default Enable Details PCI Express Device Non Fatal Error Reporting Enable Disable Option CER Disable default Enable Details PCI Express Device Correctable E...

Page 38: ...Root PCI Express System Error on Correctable Error Enable Disable Option PME SCI Disable Enable default Details PCI Express PME SCI Enable Disable Option Hot Plug Disable default Enable Details PCI E...

Page 39: ...mory 1 20MB Range for this Root Bridge Option Reserved I O Minimum 0x04 Maximum 0x14 Default 0x04 Details Reserved I O 4K 8K 12K 16K 20K Range for this Root Bridge PCH PCIe LTR Configuration Option PC...

Page 40: ...s 33554432 ns Details LTR Snoop Latency Multiplier of PCH PCIE Option Non Snoop Latency Override Disabled Manual Auto default Details Non Snoop Latency Override for PCH PCIE Disabled Disable override...

Page 41: ...e emphasis Disabled Enabled default Details When the Link is operating at 5 0 GT s speed this bit selects the level of de emphasis for an Upstream component 1b 3 5 dB 0b 6 dB PCH PCIe LTR Configuratio...

Page 42: ...32 ns 1024 ns default 32768 ns 1048576 ns 33554432 ns Details LTR Snoop Latency Multiplier of PCH PCIE Option Non Snoop Latency Override Disabled Manual Auto default Details Non Snoop Latency Overrid...

Page 43: ...on PCIe Selectable De emphasis Disabled Enabled default Details When the Link is operating at 5 0 GT s speed this bit selects the level of de emphasis for an Upstream component 1b 3 5 dB 0b 6 dB Syste...

Page 44: ...Disabled Enabled default Details Enable PCH to aggressively enter link power state Option Port 0 Disabled Enabled default Details Enable or Disable SATA Port Option SATA Port 0 Hot Plug Capability Di...

Page 45: ...rd Disk Drive default Solid State Drive Details Identify the SATA port is connected to Solid State Drive or Hard Disk Drive Option SATA Port 0 DevSlp Disabled default Enabled Details Enable Disable SA...

Page 46: ...nical Presence Switch Note Requires hardware support Option Spin Up Device Disabled default Enabled Details If enabled for any of ports Staggerred Spin Up will be performed and only the drives which h...

Page 47: ...Maximum 0x03FF Default 0x0271 Details DITO Value Option DM Value Minimum 0x00 Maximum 0x0F Default 0x0F Details DM Value System Setup South Cluster Configuration SCC Configuration Option SCC SD Card...

Page 48: ...le SCC SDIO Support System Setup South Cluster Configuration USB Configuration Option XHCI Pre Boot Driver Enable Disable default Details Enable Disable XHCI Pre Boot Driver support Option xHCI Mode E...

Page 49: ...to A Series or B Series Option SSIC Dlane PowerGating Enable default Disable Details Enable Disable SSIC Data lane Power Gating Option USB Port Disable Override Disable Enable default Details Selecti...

Page 50: ...RUE Details Options to disable XHCI Link Compliance Mode Default is FALSE to not disable Compliance Mode Set TRUE to disable Compliance Mode Option USB HW MODE AFE Comparators Disable default Enable D...

Page 51: ...Mode Disable Enable default Details Enable interrupt when PWRBTN is asserted Option Board Clock Spread Spectrum Disable default Enable Details Enable Clock Chip s Spread Spectrum feature Option Wake...

Page 52: ...Lock Down TCO Option GPIO Lock Disabled default Enabled Details Enable to set GPIO Pad Configuration Lock for security System Setup Boot Option OS Selection Windows default Legacy OS Intel Linux Deta...

Page 53: ...Read Time Enable and IDI Agent Real Time Traffic Mask Bits System Setup Security Configuration TXE Configuration Option SEC Disabled Enabled default Details Option SeC HMRFPO Disabled default Enabled...

Page 54: ...y Discrete TPM 1 2 or Discrete TPM 2 0 Option PTT Enabled PCR Banks SHA1 default SHA256 Both Details Select the PCR banks you wish to support System Setup Thermal Thermal Configuration Parameters Opti...

Page 55: ...the ACPI Critical Trip Point the point in which the OS will shut the system off Option Hot Trip Point 15 C 23 C 31 C 39 C 47 C 55 C 63 C 71 C 79 C 87 C 95 C 100 C 103 C 110 C 119 C default 125 C Detai...

Page 56: ...e controls the temperature of the ACPI Passive Trip Point the point in which the OS will begin throttling the processor Option Active Trip Point 15 C 23 C 31 C 39 C 47 C 55 C 60 C default 63 C 71 C 79...

Page 57: ...default Enable Details Enable Disable PMIC ACPI Device Option PNP Setting Disable Power Performance default Details Select PNP setting mode Disable Performance Power or Power Performance mode Option O...

Page 58: ...Details Enable DDR Spread Spectrum Clocking configuration Option DDR SSC Selection Table 0 No SSC 0 1 0 2 0 3 0 4 0 5 default Details Choose the item in SSC selection table for DDR spread spectrum Opt...

Page 59: ...ugger Configuration Option Kernel Debugger Enable Disable default Enable Details Enable or disable support for a kernel debugger e g WinDBG This mode configures the UART2 device for Legacy 16550 8 bit...

Page 60: ...ls If enable BIOS will lock SETUP variable after end of post PTT Debug Option Option Suppress PTT Commands Disabled default Enabled Details Bypass TPM2 commands submitting to PTT FW TDO GPIO Pin Switc...

Page 61: ...f main memory to be reserved for Pram The memory will be allocated right after MRC initialization and its location will be stored into ACPI table OS DNX Option OS DnX focus entry Enable Disable defaul...

Page 62: ...64MB 128MB Details Disable or Select Processor trace memory region Size from 4KB 128MB Option Processor trace Disabled default Enabled Details Enable Disable processor trace feature from CPU MSR Enab...

Page 63: ...Capsule Update System Setup NPK Debug Configuration Option North Peak Enable Disable Enable Debugger Auto default Details North Peak Function Enable Option FW Trace Enable Disable Enable default Detai...

Page 64: ...Region 0 Buffer Size Option Memory Region 0 Buffer WrapAround NoWrap Wrap default Details Memory Region 0 Buffer WrapAround Option Memory Region 1 Buffer Size None default 1MB 8MB 64MB 128MB 256MB 51...

Page 65: ...ing Off default 1 2 3 4 5 6 Details PTI Training Option PTI Speed Full Speed Half Speed Quarter Speed default Details PTI Speed Option Punit Message Level LEVEL NONE LEVEL LOW default LEVEL MEDIUM LEV...

Page 66: ...Native control 0 Hot Plug 1 SHPC Native Hot Plug control 2 Power Management Events 3 PCIe Advanced Error Reporting control 4 PCIe Capability Structure control 5 Latency Tolerance Reporting control Opt...

Page 67: ...d Enabled default Details Option PCI Delay Optimization Disabled default Enabled Details Experimental ACPI additions for FW latency optimizations Option EC Notification Disabled Enabled default Detail...

Page 68: ...efault Details Choose Slate or Laptop as boot mode Option Slate Mode on S3 and S4 resume No change default Toggle Details Keep it the same as Sx entry or toggle it Option IUER Dock Enable Disabled def...

Page 69: ...Option PEP Graphics Disabled Enabled default Details Add Gfx in PEP mitigation list Option PEP SATA No Constraint Storage Ports default Storage Controller PCIe SSD Controller PCIe SSD Port Details Ad...

Page 70: ...led Details Add I2C1 in PEP mitigation list Option PEP I2C2 Disabled default Enabled Details Add I2C2 in PEP mitigation list Option PEP I2C3 Disabled default Enabled Details Add I2C3 in PEP mitigation...

Page 71: ...ls Add I2C7 in PEP mitigation list Option PEP PWM1 Disabled default Enabled Details Add PWM1 in PEP mitigation list Option PEP HSUART1 Disabled default Enabled Details Add HSUART1 in PEP mitigation li...

Page 72: ...abled Details Add SPI1 in PEP mitigation list Option PEP SPI2 Disabled default Enabled Details Add SPI2 in PEP mitigation list Option PEP SPI3 Disabled default Enabled Details Add SPI3 in PEP mitigati...

Page 73: ...isabled default Enabled Details Enable Disable Runtime D3 support Option Consolidated Power Resource Disabled default Enabled Details Enables Disables 1 Power Resource for all power gated devices exce...

Page 74: ...T Option PCIE Slot 5 Device Power off delay in ms Minimum 0x00 Maximum 0x0A Default 0x0A Details Delay after removing Core power Option Audio Delay Minimum 0x0000 Maximum 0x03E8 Default 0x00C8 Details...

Page 75: ...tails Delay in PR _ON after applying power to TouchPanel device Option P state Capping Disabled default Enabled Details Set _PPC and send ACPI notification Option USB Port 1 2 High Speed Super Speed D...

Page 76: ...ra Disabled default Enabled Details USB Camera option is applicable only for WhiteTipMountain1 AdenHills and Sawtoothpeak with USB Camera Feature rework Option Sata Port 1 Disabled default Enabled Det...

Page 77: ...Log Option Single Bit Disabled Enabled default Details Option Multi Bit Disabled Enabled default Details Option Halt On Uncorrectable Error Disabled Enabled default Details Controls whether to halt o...

Page 78: ...r Only default Details Supports user only or both user and master password Trusted Platform Module TPM Security TPM Configuration Option Current TPM State Unknown default Enabled and Activated Enabled...

Page 79: ...M to be Enabled to take effect Option TPM Action No Change default TPM2 HierarchyControl TPM_RH_OWNER YES TPM_RH_ENDORSEMENT YES TPM2 HierarchyControl TPM_RH_OWNER NO TPM_RH_ENDORSEMENT NO TPM2 ClearC...

Page 80: ...SHA1 Option PCR Bank SHA256 Unchecked Checked default Details TCG2 Request PCR Bank SHA256 Option PCR Bank SHA384 Unchecked default Checked Details TCG2 Request PCR Bank SHA384 Option PCR Bank SHA512...

Page 81: ...an mSATA module The mSATA specifications states that Pin 51 on the connector can be used to automatically detect an mSATA module But some modules also use Pin 43 due to conflicts on Pin 51 Almost all...

Page 82: ...s Configure UART fast mode Option UART1 Disabled Enabled default Details Enable or disable UART1 Option Base Address 3F8 default 2F8 3E8 2E8 220 228 238 338 Details Select the base address for UART1 O...

Page 83: ...c Direction Control Details Select the mode for UART1 Option UART2 Disabled Enabled default Details Enable or disable UART2 Option Base Address 3F8 2F8 default 3E8 2E8 220 228 238 338 Details Select t...

Page 84: ...c Direction Control Details Select the mode for UART2 Option UART3 Disabled Enabled default Details Enable or disable UART3 Option Base Address 3F8 2F8 3E8 default 2E8 220 228 238 338 Details Select t...

Page 85: ...c Direction Control Details Select the mode for UART3 Option UART4 Disabled Enabled default Details Enable or disable UART4 Option Base Address 3F8 2F8 3E8 2E8 default 220 228 238 338 Details Select t...

Page 86: ...omatic Direction Control Details Select the mode for UART4 VersaLogic Features PCI IRQ Routing Configuration Option PIRQA Routing IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 default Details Configure PC...

Page 87: ...6 IRQ7 IRQ9 IRQ10 IRQ11 default Details Configure PCI IRQ Routing Number Option PIRQD Routing IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 default Details Configure PCI IRQ Routing Number Option PIRQE Ro...

Page 88: ...6 IRQ7 IRQ9 IRQ10 IRQ11 default Details Configure PCI IRQ Routing Number Option PIRQG Routing IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 default IRQ11 Details Configure PCI IRQ Routing Number Option PIRQH Ro...

Page 89: ...onfiguration IPv6 Current Setting Option DAD Transmit Count Minimum 0x00000000 Maximum 0x0000000A Default 0x00000000 Details The number of consecutive Neighbor Solicitation messages sent while perform...

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