VeEX RXT-6000e, User Manual

Page: 315 / 387

14.0 PCS
14.1 Setup
14.1.1 Tx Lane Mapping and Skew
PCS to CAUI lanes configurable mapping:
Defines the alignment markers ID that will be assigned to each lane
Default, random or manual setting
Receivers must be able to reorder and reassemble any mapping of PCS lanes into single stream
Lane Skew generation (up to 16000 bits time)
Enter relative delay that will be introduced for the PCS lane pair (CAUI lane)
Stresses the de-skew function on the receiver side
Skew alarm threshold value:
User configurable threshold for Skew alarm
PCS Setup - Tx Lane Mapping and Skew
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14.1.2 Tx Alarm/ Error Injection
Error Injection per PCS lane:
Invalid Sync header: first 2 bits of the 64/66 block header
Invalid alignment marker: inserted every 16383 block on each virtual lane it contains the Virtual lane
identifier
BIP: generates bit interleave parity error
Alarm Generation:
LOBL: Loss of block lock
LOA:
Loss of Alignment marker
HI-BER: high bit error rate of sync header
RXT-6200_RXT6000e_Module_Manual Page 315 of 387