Chapter 3
11
Programming with the Low-Level API
Tel: 508-921-4600
www.ueidaq.com
Vers:
1.4
Date:
September 2010
File:
AO-308-353 Chap3.fm
© Copyright 2009
United Electronic Industries, Inc.
// "STS" LED status
#define DQ_LN_ENABLED (1L<<0)
// enable operations
For streaming operations with hardware clocking, select the following
flags:
DQ_LN_ENABLE | DQ_LN_CVCKSRC0 | DQ_LN_STREAMING |
DQ_LN_IRQEN | DQ_LN_ACTIVE | DQ_AO308_BI10
AO-308x has a range of -specific settings - as follows:
The following modes are reserved for future use:
#define DQ_AO308_MODEFIFO (1L << 19)
// continuous output with FIFO
#define DQ_AO308_MODECONT (2L << 19)
// waveform mode – continuous
#define DQ_AO308_MODECYCLE (3L << 19)
// waveform mode – regenerate
#define DQ_AO308_MODEWFGEN (4L << 19)
// waveform mode - hardware
DQ_LN_ENABLE
enables all operations with the .
DQ_LN_CVCKSRC0
selects the internal channel list clock (CL) source as a timebase. AO-308
supports CV clock.
DQ_LN_ACTIVE
is needed to switch on “STS” LED on the CPU .
You can select either the CL or CV clock as a timebase. Because of the
parallel architecture of AO-308x , either clock triggers all converters.
Aggregate rate = Per-channel rate * Number of
channels
Note that acquisition rate cannot be selected on per-channel basis.
Summary of Contents for DNx-AO-308-353
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