DNx-SL-514 Synchronous Serial Interface Board
Chapter 1
11
Introduction
May 2018
www.ueidaq.com
508.921.4600
© Copyright 2018
United Electronic Industries, Inc.
1.7.4
Error
Checking &
Status
Reporting
The SL-514 will report errors and status based on the following conditions:
•
Slave detected master timing error (
SL514_CSTS_TXERR)
:
•
if master clock pulses low during pause time (t
p
) delay (transmission
starts too early)
•
Master detected slave timing error (
SL514_CSTS_RXERR)
:
•
if slave data pulses high during transfer timeout/monoflop time (t
m
)
delay
•
if slave drives data low before rising edge of first master clock after
idle state
•
Slave TX FIFO empty (
SL514_CSTS_TXFE)
•
Master RX FIFO empty (
SL514_CSTS_RXFF)
•
Slave channel busy, sending data (
SL514_CSTS_TXBSY)
•
Master channel busy, receiving data (
SL514_CSTS_RXBSY)
•
Slave TX FIFO is below watermark, currently set to half the FIFO size
(
SL514_CSTS_TXFHF)
•
Slave RX FIFO is above watermark, currently set to half the FIFO size
(
SL514_CSTS_RXFHF)
The SL-514 master controllers only store SSI words that are received without
timing errors in the FIFO.
1.7.5
Termination
The SL-514 features termination resistors on both the receiver and transmitter
lines to provide a driver load impedance of 100
Ω
.
Refer to
.
Figure 1-5 Settable Termination Circuit Diagram
Each of these lines can be set through software in the low-level API. Refer to
for more information.
1.7.6
Electrical
Specification
for Serial Port
Lines
The SL-514 is compliant with RS-422 and RS-485 standards for electrical
characteristics of drivers and receivers used in serial communication.
Refer to TIA/EIA-422 and TIA/EIA-485 Standards documentation for more
information.
100
Ω
100
Ω
ENABLE*
Driver
Tx Termination Rx Termination
* Note: Only used channels are enabled. Unused channels are automatically disabled by the firmware.
I/O
Driver