1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
A
B
C
D
A
B
C
D
D4
BZX84C2V7
1
3
R24
15K
TP4
TP5
TP2
TP3
X1
11.05920MHz
J6
1
2
3
4
5
6
7
V6108
U4
2
3
4
12
CLK
7
D0
11
DI
13
FR
5
R
1
S1
44
S10
43
S11
42
S12
41
S13
40
S14
39
S15
38
S16
37
S17
36
S18
35
S19
52
S2
34
S20
33
S21
32
S22
31
S23
30
S24
29
S25
28
S26
27
S27
26
S28
25
S29
51
S3
24
S30
23
S31
22
S32
21
S33
20
S34
19
S35
18
S36
17
S37
16
S38
15
S39
50
S4
14
S40
49
S5
48
S6
47
S7
46
S8
45
S9
6
STR
9
VDD
8
Vlcd
10
VSS1
VMX1020
U6
58
ADCI3
49
AGND1
63
AGND2
21
DGND
54
ISRCIN
53
ISRCOUT
2
OPIN+
1
OPIN-
64
OPOUT
3
POT1A
4
POT1B
55
POT2A
56
POT2B
10
RX1D+
8
RX1D-
9
TX1D+
7
TX1D-
30
VDD1
40
VDD2
57
VDDA
44
VPP
46
VTRIM
52
RESET
59
ADCI2
19
CCU2
50
INT0
47
NC
36
OSC0
35
OSC1
38
P31-RX0
39
P32-T0IN
41
P33-CCU0
42
P34-CCU1
43
P35-T1IN
45
P36-SDA
48
P37-SCL
5
SW1A
62
XTVREF
61
ADCI0
60
ADCI1
20
INT1
14
P00-T2IN
13
P01-T2EX
12
P02-TX1
11
P03-RX1
15
P10-PWM0
16
P11-PWM1
17
P12-PWM2
18
P13-PWM3
31
P14
32
P15
33
P16
34
P17
22
P20-CS3-
23
P21-CS2-
24
P22-CS1-
25
P23-CS0-
26
P24-SS-
27
P25-SCK
28
P26-SDO
29
P27-SDI
37
P30-TX0
51
PM
6
SW1B
SK2
1
3
2
4
South Wales. NP26 5PS. UK
Portskewett, Caldicot
Lodge Way
ultratec 2003
Copyright
Drg No:
Date
ECN
Issue
Drawn:
Ultrasound Technologies Ltd
Date:
of
Sheet
Name:
PD1PLUS2
2
2
MAX202E
U7
8
R2in
9
R2out
10
T2in
7
T2out
2
V+
6
V-
1
C1+
3
C1-
4
C2+
5
C2-
13
R1in
12
R1out
11
T1in
14
T1out
ZR78L05G
U8
3
IN
1
OUT
J5
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25
26
3
4
5
6
7
8
9
R16
22K
R14
47K
R12
68K
R15
68K
C30
47nF
R22
330K
R26
330K
LM324M
U5
3
I+
2
I-
4
11
1
LM324M
U5
5
I+
6
I-
4
11
7
LM324M
U5
10
I+
9
I-
4
11
8
LM324M
U5
12
I+
13
I-
4
11
14
C22 1nF
C34
1nF
C28 22pF
C27 22pF
R11
100K
R25
100K
R27
100K
BAS16
D3
1
3
R23
10K
R21
10K
R20
10K
R19
10K
R13
10K
R18
10K
R17
10K
+
C25 10uF
+
C40 10uF
C35
10nF
C31 1uF
C26
1uF
C43
100nF
C44
100nF
C23 100nF
C39 100nF
C32 100nF
C33 100nF
C37 100nF
C36 100nF
C38 100nF
C41 100nF
C42
100nF
C29
100nF
C24
100nF
Vcc
Vcc
Disp1[1:7]
Disp2[1:7]
b
p
Disp1[1]
Disp1[2]
Disp1[3]
DispSym1
fetal_signal_complex
Vcc
Vcc
Vcc
Disp1[4]
BatteryCondition {01}
R
Disp1[5]
RS232_Rx
STR
Disp1[6]
Disp1[2]
b
p
RS232_Tx
Vcc
Disp1[7]
Disp1[1]
Disp1[3]
Disp2[1]
FR
Disp1[6]
Disp1[4]
Disp2[2]
R
Disp1[7]
Disp1[5]
Disp2[3]
STR
Disp2[2]
Disp2[3]
SDO
Disp2[4]
Disp2[1]
Disp2[4]
UnitShutDown {01}
SCLK
Disp2[5]
Disp2[6]
Disp2[5]
FR
Disp2[6]
Disp3[2]
Disp2[7]
Disp2[7]
Disp3[1]
Disp3[3]
Disp3[1]
Disp3[6]
Disp3[4]
Disp3[2]
DispSym2
Disp3[5]
SCLK
Disp3[3]
Disp3[7]
SDO
Disp3[4]
FHR_Agc
Disp3[5]
Disp3[6]
Disp3[1:7]
Disp3[7]
DispSym1
DispSym2
Vcc
SDA
SCL
Reset
Vcc
Vcc
SCL
SDA
Reset
AudioComplex {01}
FHR_Agc
fetal_signal_complex
Low Pass filter fo = 220Hz
Device Programming Interface
Processor Digital Pot is 30K
11 MHz Clock
6
Jan 05
Aug 02
210
5
PD1 Plus s2 Digital Signal Processor
RS232
Fetal Complex
LowPass Filter (5Hz)
Precision Rectifier
182
June 00
4
Nov 99
178
3
1
7
6
Sept 99
2
June 98
1
LCD Interface
Summary of Contents for PD1 series
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