SARA-N2 / N3 series - System integration manual
UBX-17005143 - R13
Design-in
Page 67 of 95
C1-Public
2.7
ADC
☞
ADC interface is not available on the SARA-N2 modules.
2.7.1.1
Guidelines for ADC circuit design
The SARA-N3 series modules include two Analog-to-Digital Converter input pins,
ANT_DET
and
ADC1
,
configurable via a dedicated AT command (for further details, see the SARA-N2 / SARA-N3 series AT
commands manual
). For example, the
ADC1
input pin can be connected to an external voltage
divider for voltage measurement purpose as illustrated in
SARA-N3 series
ADC1
R2
33
Voltage
R1
Figure 46: ADC application circuit example
☞
The ESD sensitivity rating of the
ADC1
pin is 1 kV (HBM according to JESD22-A114). Higher
protection level could be required if the line is externally accessible on the application board. Higher
protection level can be achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG
varistor array) close to an accessible point.
☞
2.7.1.2
Guidelines for ADC layout design
The ADC circuit requires careful layout to perform proper measurements - ensure that no transient
noise is coupled on this line; otherwise the measurements might be affected. It is recommended to
keep the connection line to
ADC1
as short as possible.
