LENA-R8 series - System integration manual
UBX-22015376 - R02
Design-in
Page 96 of 116
C1-Public
2.17
Design-in checklist
This section provides a design-in checklist.
2.17.1
Schematic checklist
The following are the most important points for a simple schematic check:
DC supply must provide a nominal voltage at the
VCC
pins within the operating range limits.
DC supply at the
VCC
pins must be capable of supporting both the highest peak and the highest
averaged consumption values in connected mode, as specified in LENA-R8 series data sheet
VCC
voltage supply should be clean, with very low ripple/noise: provide the suggested bypass
capacitors, in particular if the application device integrates an internal antenna.
Minimize series resistance along the
VCC
path.
Do not apply loads which might exceed the limit for maximum available current from
V_INT
supply.
Check that the voltage level of any connected pin does not exceed the relative operating range.
Provide accessible test points directly connected to the following pins of the modules:
o
V_INT
,
PWR_ON
and
RESET_N
for diagnostic purpose,
o
VUSB_DET
,
USB_D+
,
USB_D-
and
USB_BOOT
for FW update and diagnostic purpose.
Consider providing accessible test points on the UART
TXD
/
RXD
data lines and on the AUX UART
DTR
/
DCD
data lines, with a 0
series jumper on each line, to detach the application processor for
diagnostic purposes.
Capacitance and series resistance must be limited on each line of the SIM interface to match the
rise / fall time defined by SIM interface specifications.
Insert the suggested pF capacitors on each SIM signal and low capacitance ESD protections if the
SIM connector is accessible.
Check UART interfaces
signals direction, as the modules’ signal names follow the ITU
-T V.24
Recommendation
TXD
is the module UART data input,
RXD
is the module UART data output.
Capacitance and series resistance must be limited on each high-speed line of the USB interface.
Check the digital audio interface specifications to connect a proper external audio device.
Capacitance and series resistance must be limited on clock output line and each I2S interface line.
Consider passive filtering parts on each used analog audio line.
Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 k
resistor
on the board in series to the GPIO when those are used to drive LEDs.
Provide proper precautions for ESD immunity as required on the application board.
Do not apply voltage to any generic digital interface pin of LENA-R8 series modules before the
switch-on of the generic digital interface supply source (
V_INT
).
GNSS DC supply must provide a tight nominal voltage at the
VCC_GNSS
pin within the operating
range limits.
GNSS DC supply at the
VCC_GNSS
pin must be capable of supporting both the highest peak and
the highest averaged consumption values in connected mode, as specified in LENA-R8 series data
sheet
VCC_GNSS
voltage supply should be clean, with very low ripple/noise, tight at 1.8V.
Minimize series resistance along the
VCC_GNSS
path.
Implement a back-up power supply at
VBCKP_GNSS
in case it is required to enable the GNSS
hardware backup mode when the main GNSS supply
VCC_GNSS
is not present.
Check GNSS
UART interfaces signals direction, as the modules’ signal names follow th
is rule:
GNSS_RXD
is the module GNSS UART data input,
GNSS_TXD
is the module GNSS UART data
output.
Do not apply voltage to any GNSS digital interface pin of the LENA-R8001M10 modules before
applying the GNSS digital interface supply source (
VCC_GNSS
).
