EVK-NORA-B1 - User guide
UBX-20030319 - R06
Hardware description
Page 13 of 31
C1-Public
If an internal LF clock source is used, the crystal can be removed from the circuit by opening jumpers
J16 and J19. Soldering across the normally open position connects XL1 and XL2 to the EVK headers.
Figure 7: Schematic
–
32 kHz crystal
2.7
NFC connector
Connection to an external NFC antenna is provided through a Molex flat-flex connector, part number
051281
–
0594. Capacitors C48 and C49 provide tuning of the NFC antenna for resonance at
13.56 MHz.
☞
The values of C48 and C49 are tuned for use with the supplied NFC antenna. These values might
need to be changed if a different antenna is used. See also the nRF5340 product specification
Figure 8: NFC connector
By default, the NORA-B1 module pins P0.02 and P0.03 are configured for NFC use. These pins can
also be used for digital GPIO functions by modifying the population of R15, R16, R22, and R23 and the
value of the NFCPINS UICR register.
Mode
Populate: R15
R16
R22
R23
NFCPINS UICR register
NFC (default)
X
X
0xFFFFFFFF (enable protection, use as NFC)
GPIO
2,3
X
X
0xFFFFFFFE (disable protection, use as GPIO)
Table 7: P0.02 and P0.03 pin configuration
2
P0.02 and P0.03 have a pad capacitance of approximately TBD pF higher than other GPIO pins.
3
When used as GPIO, P0.02 and P0.03 will exhibit approximately TBD µA leakage when driven to different states.
