u-blox NEO-5 Series, Hardware Integration Manual

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NEO-5 - Hardware Integration Manual Preliminary
GPS.G5-MS5-08003-A2 u-blox proprietary Page 51
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D Lists
D.1 List of Figures
Figure 1: NEO-5 Block Diagram ...................................................................................................................................................................... 9
Figure 2: Backup Battery and Voltage ........................................................................................................................................................... 10
Figure 3: USB Interface ................................................................................................................................................................................. 12
Figure 4: Connecting Module as DDC Slave.................................................................................................................................................. 13
Figure 5: Recommended wiring for active antennas...................................................................................................................................... 15
Figure 6: Recommended layout for connecting the antenna bias voltage for NEO-5 ..................................................................................... 15
Figure 7: Passive Antenna Design for NEO-5 Receivers .................................................................................................................................. 16
Figure 8: Recommended footprint ................................................................................................................................................................ 19
Figure 9: Recommendations for copper, solder and paste masks with enlargement .....................................................................................20
Figure 10: Placement.................................................................................................................................................................................... 21
Figure 11: Recommended layout .................................................................................................................................................................. 22
Figure 12: PCB build-up for Micro strip line. Left: 2-layer PCB, right: 4-layer PCB ..........................................................................................22
Figure 13: Micro strip on a 2-layer board (Agilent AppCAD Coplanar Waveguide) ........................................................................................24
Figure 14: Micro strip on a multi layer board (Agilent AppCAD Coplanar Waveguide) ..................................................................................24
Figure 15: Reeled u-blox 5 Modules ............................................................................................................................................................. 26
Figure 16: Dimension of reel for 250 pieces (dimensions unless otherwise specified in mm).......................................................................... 26
Figure 17: Dimensions and orientation for NEO-5 modules on tape ..............................................................................................................27
Figure 18: Applicable MSD Label (See Section 3.1 for baking instructions) ....................................................................................................28
Figure 19: Humidity Indicator Card, good condition ..................................................................................................................................... 29
Figure 20: Recommended soldering profile................................................................................................................................................... 32
Figure 21: Automatic Test Equipment for Module Tests ................................................................................................................................ 35
Figure 22: 1-channel GPS simulator .............................................................................................................................................................. 36
Figure 23: Patch Antennas, EMTAC Technology Corp................................................................................................................................... 38
Figure 24: Quadrifilar Helix Antenna, Sarantel, Ltd. ...................................................................................................................................... 38
Figure 25: Typical Radiation Pattern of a Patch Antenna, MuRata, Inc...........................................................................................................40
Figure 26: Typical Gain and Axial Ratio of a Patch antenna with respect to ground plane size, MuRata, Inc. ................................................. 40
Figure 27: Radiation pattern of helix antenna without ground plane, Sarantel, Ltd. ......................................................................................41
Figure 28: Dependency of center frequency on ground plane dimension for a 25 x 25 mm
2
patch, EMTAC .................................................. 42
Figure 29: Signal and power plane extends should lie within ground plane extends...................................................................................... 45
Figure 30: Further improvement of reduction of power plane radiation ........................................................................................................45
Figure 31: Terminating radiation of signal lines............................................................................................................................................. 46
Figure 32: Impedance of 0805 size SMD capacitors vs. frequency, MuRata................................................................................................... 46
Figure 33: Temperature dependency of COG/NPO dielectric, AVX ................................................................................................................47
Figure 34: Temperature dependency of X7R dielectric, AVX .........................................................................................................................47
Figure 35: Temperature dependency of Y5V dielectric, AVX .........................................................................................................................47
Figure 36: Ideal shielding.............................................................................................................................................................................. 48
Figure 37: MuRata’s NFM21C Feed Through Capacitors ............................................................................................................................... 49
Figure 38: Two shielded sub-systems, connected by a “poor” ground ..........................................................................................................50