TYAN TN76-BP016, Service Manual

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6.2 Hostboot IPLs Progress Code
The Hostboot initial program loads (IPLs) progress codes are the simple set of
checkpoints during the Hostboot firmware boot process. The following table
describes the type of checkpoints that may occur during the IPLs portion of the
Hostboot:
Checkpoint Ranges Overview
Status of IPLs Range Description
ISTEP 06.01 – 06.13 IStep 06 - Slave SBE
ISTEP 07.01 – 07.09 IStep 07 - Nest Chiplets
ISTEP 08.01 – 08.08 IStep 08 - EDI, EI Initialization
ISTEP 09.01 – 09.02 IStep 09 - Activate PowerBus
ISTEP 10.01 – 10.14 IStep 10 - Hostboot SBE Centaur Init
ISTEP 11.01 – 11.13 IStep 11 - DMI Training
ISTEP 12.01 – 12.05 IStep 12 - MC Config
ISTEP 13.01 – 13.12 IStep 13 - DRAM Training
ISTEP 14.01 – 14.09 IStep 14 - DRAM Initialization
ISTEP 15.01 – 15.03 IStep 15 - Build Winkle Images
ISTEP 16.01 – 16.04 IStep 16 - Core Activate
ISTEP 18.13 – 18.14 IStep 18 - Establish System SMP
ISTEP 21.01 – 21.03 IStep 21 - Start Payload
Progress Code Description
IStep 06 – Slave SBE
ISTEP 06.01 Setup host environment (non-executable istep)
ISTEP 06.02 Hostboot istep ready (non-executable istep)
ISTEP 06.03 Setup the FSI links to slave chips
ISTEP 06.04 Build IPL parameters
ISTEP 06.05 Builds targeting
ISTEP 06.06 Do Gard
ISTEP 06.07 Clear deconfigured states
ISTEP 06.08 Clean up MCS extent regs
ISTEP 06.09 Setup centaur ref clocks
ISTEP 06.10 Update SBE config data area
ISTEP 06.11 Start the SBE engine on slave chips
ISTEP 06.12 Check Slave SBE Complete
ISTEP 06.13 vSBE Init of Slave Chips