TYAN S8226, User Manual

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3.7.1 North Bridge Configuration
BIOS Setup Utility
Main Advanced PCI/PnP Boot Security Chipset Exit
NorthBridge Chipset Configuration

Memory Configuration

ECC Configuration

DRAM Timing Configuration
Memory Timing Parameters [CPU Node 0]
Memory CLK
CAS Latency (Tcl)
RAS/CAS Delay (Trcd)
Row Precharge Time (Trp)
Min Active RAS (Tras)
RAS/RAS Delay (Trrd)
Row Cycle (Trc)
Read to Precharge (Trtp)
Write Recover Time (Twr)
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
←
Select Screen
↑↓
Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
Memory Timing Parameters
Select which node’s timing parameters to display.
CPU Node 0 / CPU Node 1