TYAN S8020, Manual

Page: 113 / 168

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113
boot init
TpProcCpuOptimizedBootEnd
= 0xE056, ///< Exit point CPU Optimized
boot
init
TpProcCpuApobCcxEdcInitStart
= 0xE057, ///< Entry point CPU APOB
EDC
info init
TpProcCpuApobCcxEdcInitEnd
= 0xE058, ///< Exit point CPU APOB EDC
info init
TpProcCpuInitAfterReplayBufferStart
= 0xE059, ///< Entry point CPU init after
replay buffer
TpProcCpuInitAfterReplayBufferEnd
= 0xE05A, ///< Exit point CPU init after
replay buffer
// Topology test points
TpProcTopologyEntry = 0xE071, ///< ProcTopologyEntry
TpProcTopologyDone = 0xE07C, ///< ProcTopologyDone
// Extended memory test point
TpProcMemSendMRS2 = 0xE080, ///< ProcMemSendMRS2
TpProcMemSendMRS3 = 0xE081, ///< Sedding MRS3
TpProcMemSendMRS1 = 0xE082, ///< Sending MRS1
TpProcMemSendMRS0 = 0xE083, ///< Sending MRS0
TpProcMemContinPatternGenRead = 0xE084, ///< Continuous Pattern Read
TpProcMemContinPatternGenWrite = 0xE085, ///< Continuous Pattern Write
TpProcMem2dRdDqsTraining
= 0xE086, ///< Mem: 2d RdDqs Training
begin
TpProcMemBefore2dTrainExtVrefCh
ange = 0xE087, ///< Mem: Before optional
callout to platform BIOS to change
External Vref during 2d Training
TpProcMemAfter2dTrainExtVrefChan
ge = 0xE088, ///< Mem: After optional callout
to platform BIOS to change External Vref
during 2d Training
TpProcMemConfigureDCTForGenera
l
= 0xE089, ///< Configure DCT For
General use begin
TpProcMemProcConfigureDCTForTr
aining
= 0xE08A, ///< Configure DCT For
training begin
TpProcMemConfigureDCTNonExplici
tSeq
= 0xE08B, ///< Configure DCT For Non-
Explicit
TpProcMemSynchronizeChannels = 0xE08C, ///< Configure to Sync
channels
TpProcMemC6StorageAllocation = 0xE08D, ///< Allocate C6 Storage
TpProcMemLvDdr4 = 0xE08E, ///< Before LV DDR4