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81
Flow Control
Flow Control can prevent data loss from buffer overflow. When sending data, if the
receiving buffers are full, a ‘stop’ signal can be sent to stop the data flow. Once the
buffers are empty, a ‘start’ signal can be sent to restart the flow. Hardware flow
control uses two wires to send start/stop signal.
None /
Hardware RTS/CTS
Data Bits
8 /
7
Parity
A parity bit can be sent with the data bits to detect some transmission errors. Even:
parity bit is 0 if the num of 1’s in the data bits is even. Odd: parity bit is 0 if the num
of 1’s in the data bits is odd. Mark: parity bit is always 1. Space: parity bit is always
0. Mark and Space parity do not allow for error detection.
None /
Even / Odd / Mark / Space
Stop Bits
Stop bits indicate the end of a serial data packet. (A start bit indicates the
beginning). The standard setting is 1 stop bit. Communication with slow devices
may require more than 1 stop bit.
1 /
2
Summary of Contents for S7040
Page 24: ...http www TYAN com 24 J15 J17 J23 J18 J19 J29...
Page 26: ...http www TYAN com 26 J33 ID_LED1 IPMB1 J26 J25 J31...
Page 28: ...http www TYAN com 28 J30 J80 J32 KEY_1 SGPIO2 SGPIO4 SGPIO3...
Page 30: ...http www TYAN com 30 J79 J196 CLEAR_BTN1 2PHD_1 2PHD_2...
Page 33: ...http www TYAN com 33 2 You have completed the Patsburg Upgrade ROM Key installation...
Page 62: ...http www TYAN com 62 3 6 6 1 Socket 0 CPU Information Read only...
Page 67: ...http www TYAN com 67 3 6 8 SATA Configuration...
Page 69: ...http www TYAN com 69 3 6 9 SAS Configuration Read only...
Page 74: ...http www TYAN com 74...
Page 75: ...http www TYAN com 75 3 6 13 Super I O Configuration Super IO Chip Read only...
Page 83: ...http www TYAN com 83 3 7 1 North Bridge Chipset Configuration...
Page 91: ...http www TYAN com 91 3 7 1 3 DIMM Information Read only...
Page 115: ...http www TYAN com 115...
Page 116: ...http www TYAN com 116 NOTE...