TE0726 TRM
Revision: V.3
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On-board Peripherals
System Controller CPLD
There is a System Controller CPLD chip LCMXO2-256HC from Lattice Semiconductor on-board. Refer to
for more information.
Clocking
Signal Name
Clock IC
Default Frequency
Destination IC
Pin
Notes
PS_CLK
U14
33.333333 MHz
U1
C7
Zynq SoC system reference clock.
OSCI
U7
12.000000 MHz
U3
3
FT2232H oscillator input.
CLK24M
U2
24 MHz (see also REFSEL0 .. 2)
U18
26
Reference input/output clock, see datasheet.
CLK25M
U13
25.000000 MHz
U2
61
External 25 MHz crystal input.
Hi-speed USB 2.0 and 10/100 Mbit Ethernet
The TE0726-03 has on-board SMSC LAN9514 controller featuring USB 2.0 hub and 10/100 Mbit Ethernet
controller. USB hub has four downstream ports and one upstream port, fully compliant with Universal Serial
Bus Specification Revision 2.0. HS (480 Mbps), FS (12 Mbps), and LS (1.5 Mbps) compatible. Upstream
port is connected to the SMSC USB3320 hi-speed USB 2.0 ULPI transceiver which has full support for the
optional On-The-Go (OTG) protocol.
High-Performance 10/100 Ethernet controller integrated into the same LAN9514 IC is fully compliant with
IEEE802.3/802.3u standards, has integrated Ethernet MAC and PHY and supports both 10BASE-T and
100BASE-TX media.
256-byte EEPROM is connected via Microwire to the LAN9514 chip to store MAC address.
USB to JTAG/UART
The TE0726-03 has on-board high-speed USB 2.0 to UART/FIFO FT2232H controller from FTDI with
external connection to micro-USB connector J1. There is also a 256-byte EEPROM wired to the FT2232H
chip via Microwire bus which holds pre-programmed license code to support Xilinx programming tools.
Do not access the FT2232H EEPROM using FTDI programming tools, doing so will erase normally
invisible user EEPROM content and invalidate stored Xilinx JTAG license. Without this license the
on-board JTAG will not be accessible any more with any Xilinx tools. Software tools from FTDI
website do not warn or ask for confirmation before erasing user EEPROM content.
