Transduction TR-LCD1500-ITX-7, User Manual

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CAS Latency Time
This controls the latency between DDR RAM read
command and the time that the data actually becomes
available.
Leave this on the default setting.
The choice: 5, 4, 3, 6, Auto
(default) .
DRAM RAS# to CAS# Delay
In order to improve performance, certain space in
memory is reserved for PISA cards.
This memory must be mapped into the memory space
below 16MB.
The choice: 2, 3, 4, 5, 6, Auto
(default) .
DRAM RAS# Precharge
This controls the idle clocks after issuing a precharge
command to DRAM.
Leave this on the default setting.
The choice: Auto
(default) , 2, 3,4,5,6.
Precharge dealy (tRAS)
The choice: Auto (default) ,
4,5,6,7,8,9,10,11,12,13,14,15.
System Memory Frequency
The choice: By SPD (default) , 667MHz, 800MHz
System BIOS Cacheable
Selecting the “Enabled” option allows caching of the
system BIOS ROM at F0000h-FFFFFh, which is able to
improve the system performance. However, any
programs that attempts to write to this memory block
will cause conflicts and result in system errors.
The choice: Enabled (
default) , Disabled.
57 TR-LCD1500-ITX-7 User Manual