3.5 Advanced Chipset Features
This option will change the values of the chipset registers and the system setting will alter.
Do not change any values if you are unfamiliar with the chipset.
•
SDRAM CAS Latency
This controls the SDRAM performance, default is “3” clocks. If your SDRAM DIMM
specification is 2 CAS latency, change “3” to “2” for better performance.
•
DRAM Timing By SPD
The DRAM timing is determined by the SPD of Memory modules which are plugged on the
motherboard.
BIOS SETUP
33
•
DRAM Clock
Set the clock frequency of the DRAMs. The default value is “Host Clock”. You can select
“HCLK+33M” if your DRAM modules are faster than the CPU (a 66 MHz FSB CPU with a
PC100 SDRAM, or a 100 MHz FSB CPU with PC133 SDRAM); or select “HCLK-33M” for
a faster CPU with slower SDRAMs.
•
Bank Interleave
This function allows you to enhance the DRAM timing.
