Transcend 80X CompactFlash Datasheet Download Page 73

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80X CompactFlash Card

Transcend Information Inc.

V1.1

6.CIS Description:

Address Data 7 6 5 4 3 2 1 0

Description of Contents

CIS function

000h

01h CISTPL_DEVICE

Device Info tuple

Tuple code

002h

04h

TPL_LINK Link

length is 4 byte

Link to next tuple

004h

DFh Device Type W Speed

Type=D: I/O device
WPS=1 : no WP switch
Speed=7: extend bye

Device type, WPS
speed

006h

79h

Speed

79:80ns

Speed

008h

01h

# Address units –1 unit size

2 Kbytes of address space

Device size

00Ah

FFh CISTPL_END

End of CISTPL_DEVICE

End marker

00Ch

1Ch CISTPL_DEVICE_OC

Common memory other

operating conditions tuple

Tuple code

00Eh

05h

TPL_LINK Link

Length is 5 byte

Link to next tuple

010h

02h

Ext Reserved 3V M

3V=1: dual voltage card,

conditions for 3.3V operation

M=0: conditions without wait

Other Conditions

Information

012h

DFh Device Type W Speed

Type=D: I/O device

WPS=1 : no WP switch

Speed=7: extend bye

Device type, WPS

speed

014h

79h

Speed

79:80ns

Speed

016h

01h

# Address units –1 unit size

2 Kbytes of address space

Device size

018h

FFh CISTPL_END

End of CISTPL_DEVICE_OC

End marker

01Ah

18h

CISTPL_JEDEC_C

JEDEC programming info tuple

Tuple code

01Ch

02h

TPL_LINK

Link length is 2 byte

Link to next tuple

01Eh

DFh JEDEC ID Device

Mnufacturer ID

Manufacturer ID

020h

01h

JEDEC Info

Manufacturer specific info

Manufacturer info

022h

20h

CISTPL_MANFID

Manufacturer ID tuple

Tuple code

024h

04h

TPL_LINK Link

Length is 4 bytes

Link to next tuple

026h

0Ah TPLMID_MANF

PC Card manufacturer code

Manufacturer ID

028h

00h

02Ah

00h

TPLMID_CARD

Manufacturer specific info

Manufacturer info

02Ch

00h

02Eh

15h

CISTPL_VERS_1

Level 1 version/product info

Tuple code

Summary of Contents for 80X CompactFlash

Page 1: ...ompactFlash PCMCIA and ATA standards Support PIO mode 0 to PIO mode 6 Support Multi Word DMA mode 0 to Multi Word DMA mode 4 Series of P only supports PIO mode 0 to mode 4 please see Ordering Informat...

Page 2: ...16 63 29 9MB TS64MCF80 125 16 63 60 8MB TS128MCF80 246 16 63 120MB TS256MCF80 500 16 63 245MB TS512MCF80 989 16 63 486MB TS1GCF80 1978 16 63 972MB Part Number Mode Description Transfer mode True IDE...

Page 3: ...T T TS S S3 3 32 2 2M M M 1 1 1G G GC C CF F F8 8 80 0 0 80X CompactFlash Card Transcend Information Inc V1 1 3 2 Product Specification 2 1 Compactflash Card Specification Transcend...

Page 4: ...T T TS S S3 3 32 2 2M M M 1 1 1G G GC C CF F F8 8 80 0 0 80X CompactFlash Card Transcend Information Inc V1 1 4 2 2 Block Diagram...

Page 5: ...2 I I1Z 12 A07 I I1Z 12 A07 I I1Z 12 A07 2 I I1Z 13 VCC Power 13 VCC Power 13 VCC Power 14 A06 I I1Z 14 A06 I I1Z 14 A06 2 I I1Z 15 A05 I I1Z 15 A05 I I1Z 15 A05 2 I I1Z 16 A04 I I1Z 16 A04 I I1Z 16 A...

Page 6: ...O OT1 46 PDIAG I O I1U ON1 47 D08 1 I O I1Z OZ3 47 D08 1 I O I1Z OZ3 47 D08 1 I O I1Z OZ3 48 D09 1 I O I1Z OZ3 48 D09 1 I O I1Z OZ3 48 D09 1 I O I1Z OZ3 49 D10 1 I O I1Z OZ3 49 D10 1 I O I1Z OZ3 49 D...

Page 7: ...eight registers in the Task File the remaining address lines should be grounded by the host BVD1 PC Card Memory Mode STSCHG PC Card I O Mode Status Changed PDIAG True IDE Mode I O 46 This signal is a...

Page 8: ...n A0 and CE2 A multiplexing scheme based on A0 CE1 CE2 allows 8 bit hosts to access all data on D0 D7 See Table 27 Table 29 Table 31 Table 35 Table 36 and Table 37 This signal is the same as the PC Ca...

Page 9: ...ress that is on the address bus This signal is used by the host to control the enable of any input data buffers between the CompactFlash Storage Card and the CPU This signal is a DMA Request that is u...

Page 10: ...ead data from the CompactFlash Storage Card in Memory Mode and to read the CIS and configuration registers In PC Card I O Mode this signal is used to read the CIS and configuration registers To enable...

Page 11: ...ments both PCMCIA and True IDE modes of operation need not alter the PCMCIA mode connections while in True IDE mode as long as this does not prevent proper operation all modes Signal Name Dir Pin Desc...

Page 12: ...tion WE PC Card Memory Mode WE PC Card I O Mode WE True IDE Mode I 36 This is a signal driven by the host and used for strobing memory write data to the registers of the CompactFlash Storage Card when...

Page 13: ...Transcend Information Inc V1 1 13 3 3 Electrical Specification The following tables indicate all D C Characteristics for the CompactFlash Storage Card Unless otherwise stated conditions are Vcc 5V 10...

Page 14: ...0V Parameter Symbol Min Max Unit Remark Supply Voltage VCC 4 5 5 5 V High level output voltage VOH VCC 0 8 V Low level output voltage VOL 0 8 V 4 0 V Non schmitt trigger High level input voltage VIH 2...

Page 15: ...VIL 1 07 V Schmitt trigger 1 Pull up resistance 2 RPU 81 39 154 85 kOhm Pull down resistance RPD 42 172 kOhm 3 3 2 3 The I O pins other than CompactFlash interface Parameter Symbol Min Max Unit Remar...

Page 16: ...T T TS S S3 3 32 2 2M M M 1 1 1G G GC C CF F F8 8 80 0 0 80X CompactFlash Card Transcend Information Inc V1 1 16 3 3 3 Output Drive Type 3 3 4 Output Drive Characteristics...

Page 17: ...CD 2 1 Connected to GND in the card Voltage Sense VS1 VS2 Pull up to Vcc 10 K R 100K Battery Detect BVD 2 1 Pull up R 50 K 3 6 Notes 1 Control Signals each card shall present a load to the socket no...

Page 18: ...ble to drive at least the following load 10 while meeting all AC timing requirements the number of sockets wired in parallel multiplied by 100pF with DC current 450 A low state and 150 A high state pe...

Page 19: ...T T TS S S3 3 32 2 2M M M 1 1 1G G GC C CF F F8 8 80 0 0 80X CompactFlash Card Transcend Information Inc V1 1 19 3 5 Attribute Memory Read Timing Figure Attribute Memory Read Timing Diagram...

Page 20: ...2M M M 1 1 1G G GC C CF F F8 8 80 0 0 80X CompactFlash Card Transcend Information Inc V1 1 20 3 6 Configuration Register Attribute Memory Write Timing Figure Configuration Register Attribute Memory Wr...

Page 21: ...ollowing OE th CE tGHEH 20 15 15 10 Wait Delay Falling from OE tv WT OE tGLWTV 35 35 35 na 1 Data Setup for Wait Release tv WT tQVWTH 0 0 0 na 1 Wait Width Time2 tw WT tWTLWTH 350 350 350 na 1 Notes 1...

Page 22: ...old Time th A tGHAX 20 15 15 15 CE Hold following WE th CE tGHEH 20 15 15 10 Wait Delay Falling from WE tv WT WE tWLWTV 35 35 35 na1 WE High from Wait Release tv WT tWTHWH 0 0 0 na1 Wait Width Time2 t...

Page 23: ...RD thA IORD tlGHAX 20 10 10 10 CE Setup before IORD tsuCE IORD tELIGL 5 5 5 5 CE Hold following IORD thCE IORD tlGHEH 20 10 10 10 REG Setup before IORD tsuREG IORD tRGLIGL 5 5 5 5 REG Hold following I...

Page 24: ...dress Setup before IOWR tsuA IOWR tAVIWL 70 25 25 15 Address Hold following IOWR thA IOWR tlWHAX 20 20 10 10 CE Setup before IOWR tsuCE IOWR tELIWL 5 5 5 5 CE Hold following IOWR thCE IOWR tlWHEH 20 2...

Page 25: ...RD high is 0 nsec but minimum IORD width shall still be met 1 t0 is the minimum total cycle time t2 is the minimum command active time and t2i is the minimum command recovery time or command inactive...

Page 26: ...T T TS S S3 3 32 2 2M M M 1 1 1G G GC C CF F F8 8 80 0 0 80X CompactFlash Card Transcend Information Inc V1 1 26...

Page 27: ...inverted from their electrical states on the bus Item Mode 0 ns Mode 1 ns Mode 2 ns Mode 3 ns Mode 4 ns Note tO Cycle time min 480 150 120 100 80 1 tD IORD IOWR asserted width min 215 80 70 65 55 1 t...

Page 28: ...gisters Write 1 0 1 1 0 X X XX X X X X Common Memory Write 8 Bit D7 D0 0 1 1 1 0 X X XX X X X X Common Memory Write 8 Bit D15 D8 0 0 1 1 0 X X XX X X X 0 Common Memory Write 16 Bit D15 D0 X 0 0 0 1 0...

Page 29: ...ification Yes L1 H H X X X H H Odd Byte Even Byte Read Byte Access CIS ROM 8 bits No L H L2 L L L L2 H High Z Even Byte Write Byte Access CIS 8 bits Invalid No L H L2 L L L H L2 Don t Care Even Byte R...

Page 30: ...upt is selected and zero 0 when Pulse Mode is selected Set to zero 0 by Reset Conf5 Conf0 Configuration Index set to zero 0 by reset It is used to select operation mode of the CompactFlash Storage Car...

Page 31: ...ue is available whether or not the I O interface has been configured This signal remains true until the condition that caused the interrupt request has been serviced If interrupts are disabled by the...

Page 32: ...ot depend on the availability of this functionality Reserved this bit is reserved for future standardization This bit shall be set to zero 0 by the software when the register is written Obsolete Drive...

Page 33: ...Odd Byte Byte Output Access 8 bits L L H H L L L H H H L L Don t Care Don t Care Even Byte Odd Byte Word Input Access 16 bits L L L L L H Odd Byte Even Byte Word Output Access 16 bits L L L L H L Odd...

Page 34: ...is permitted to monitor the OE ATA SEL signal at any time s and switch to PCMCIA mode upon detecting a high level on the pin 2 The card is permitted to re arbitrate the interface mode determination fo...

Page 35: ...host shall not configure a card into an Advanced Timing Mode if two cards are sharing I O lines as in Master Slave operation nor if it is constructed such that a cable exceeding 0 15 meters is requir...

Page 36: ...D15 D0 This register may also be accessed by a pair of byte accesses to the offset 0 with CE1 low and CE2 high Note that the address space of this word register overlaps the address space of the Erro...

Page 37: ...ord and the second byte accessed is the odd byte of the equivalent word access A byte access to register 0 with CE1 high and CE2 low accesses the error read or feature write register 2 Registers at of...

Page 38: ...accesses the error read or feature write register 2 Registers at offset 8 9 and D are non overlapping duplicates of the registers at offset 0 and 1 Register 8 is equivalent to register 0 while registe...

Page 39: ...the PCMCIA specification each of the registers below that is located at an odd offset address may be accessed in the PC Card Memory or PC Card I O modes at its normal address and also the correspondi...

Page 40: ...ad Only This register contains additional information about the source of an error when an error is indicated in bit 0 of the Status register The bits are defined as follows Figure Error Register This...

Page 41: ...starting cylinder address or bits 23 16 of the Logical Block Address 5 5 8 Drive Head LBA 27 24 Register Address 1F6h 176h Offset 6 The Drive Head register is used to select the drive and head It is...

Page 42: ...t to one Bit 6 RDY RDY indicates whether the device is capable of performing CompactFlash Storage Card operations This bit is cleared at power up and remains cleared until the CompactFlash Storage Car...

Page 43: ...that this register not be mapped into the host s I O space because of potential conflicts on Bit 7 The bits are defined as follows Bit 7 this bit is unknown Implementation Note Conflicts may occur on...

Page 44: ...lock with the supplied parameters and then writing the command code to the Command Register The manner in which a command is accepted varies There are three classes see Table 38 CF ATA Command Set of...

Page 45: ...Y Support 10 Key Management Structure Read B9 Feature 0 127 Y Y Y Y Y NOT Support 1 11 Key Management Read Keying Material B9 Feature 80 Y Y Y Y Y NOT Support 1 12 Key Management Change Key Managemen...

Page 46: ...Long Sector 32h or 33h Y Y Y Y Not Support 3 39 Write Multiple C5h Y Y Y Y Y Support 40 Write Multiple w o Erase CDh Y Y Y Y Y Support 41 Write Sector s 30h or 31h Y Y Y Y Y Support 42 Write Sector s...

Page 47: ...agnostic command is issued in a PCMCIA configuration mode this command runs only on the CompactFlash Storage Card that is addressed by the Drive Head register This is because PCMCIA card interface doe...

Page 48: ...Feature 1 X 5 6 5 Format Track 50h This command writes the desired head and cylinder of the selected drive with a vendor unique data pattern typically FFh or 00h To remain host backward compatible th...

Page 49: ...ard and aaaa indicates an ASCII string specific to the particular drive Word Address Default Value Total Bytes Data Field Type Information 848Ah 2 General configuration signature for the CompactFlash...

Page 50: ...tiword DMA transfer cycle time In PC Card modes this value shall be 0h 67 XXXXh 2 Minimum PIO transfer cycle time without flow control 68 XXXXh 2 Minimum PIO transfer cycle time with IORDY flow contro...

Page 51: ...using the definitions below and the Card is required to support for the CFA command set and report that in bit 2 of Word 83 Bit 15 12 values other than 8h and 0h are prohibited Bits 11 8 Retired These...

Page 52: ...be set to 0 indicating that IORDY may not be disabled Bit 9 LBA supported Bit 9 shall be set to 1 indicating that this CompactFlash Storage Card supports LBA mode addressing CF devices shall support...

Page 53: ...he CompactFlash Storage Card to indicate the advanced PIO modes it is capable of supporting Of these bits bits 7 through 2 are reserved Bit 0 if set to one indicates that the CompactFlash Storage Card...

Page 54: ...ature set is supported Bit 2 of word 82 shall be set to zero the Removable Media feature set is not supported Bit 3 of word 82 shall be set to one the Power Management feature set is supported Bit 4 o...

Page 55: ...support the Download Microcode command Bit 1 of word 86 shall be set to zero the CompactFlash Storage Card does not support the Read DMA Queued and Write DMA Queued commands If bit 2 of word 86 shall...

Page 56: ...set to 1 indicates that Power Level 1 commands are disabled If set to 0 indicates that Power Level 1 commands are enabled Bit 0 11 Maximum current This field contains the CompactFlash Storage Card s m...

Page 57: ...dvanced PCMCIA I O and Memory Timing Modes Capabilities and Settings This word describes the capabilities and current settings for CFA defined advanced timing modes using the Memory and PCMCIA I O int...

Page 58: ...d 7 97h or E3h C D H 6 X Drive X Cyl High 5 X Cyl Low 4 X Sec Num 3 X Sec Cnt 2 Timer Count 5 msec increments Feature 1 X 5 6 8 Idle Immediate 95h or E1h This command causes the CompactFlash Storage C...

Page 59: ...serts DMAREQ while data is available to be transferred The Card asserts DMAREQ while data is available to be transferred The host then reads the 512 sector count bytes of data from the Card using DMA...

Page 60: ...lock transfer The partial block transfer is for n sectors where n sector count modulo block count If the Read Multiple command is attempted before the Set Multiple Mode command has been executed or wh...

Page 61: ...rs the read terminates at the sector where the error occurred The Command Block Registers contain the cylinder head and sector number of the sector where the error occurred The flawed data is pending...

Page 62: ...ively a NOP command to the CompactFlash Storage Card and is provided for compatibility purposes 5 6 16 Request Sense 03h This command requests extended error information for the previous command Table...

Page 63: ...Transcend Information Inc V1 1 63 Table Extended Error Codes 5 6 17 Seek 7Xh This command is effectively a NOP command to the CompactFlash Storage Card although it does perform a range check of cylind...

Page 64: ...64 5 6 18 Set Features EFh This command is used by the host to establish or select certain features If any subcommand input value is not supported or is invalid the Compact Flash Storage Card shall r...

Page 65: ...b 000b PIO default mode disable IORDY 00000b 001b PIO flow control transfer mode 00001b Mode Reserved 00010b N A Multiword DMA mode 00100b Mode Reserved 01000b N A Reserved 10000b N A Mode transfer mo...

Page 66: ...Sleep mode is also entered when internal timers expire so the host does not need to issue this command except when it wishes to enter Sleep mode immediately The default value for the timer is 5 milli...

Page 67: ...shed by simply issuing another command a reset is not required 5 6 23 Translate Sector 87h This command allows the host a method of determining the exact number of times a user sector has been erased...

Page 68: ...lity The Sector Count Register shall always be returned with a 00h indicating Wear Level is not needed If the CompactFlash Storage Card supports security mode feature set this command shall be handled...

Page 69: ...bit transfer mode has been enabled by the Set Features command the Card shall return the Aborted error 5 6 27 Write Multiple Command C5h Note This specification requires that CompactFlash Cards suppo...

Page 70: ...lar to the Write Multiple command with the exception that an implied erase before write operation is not performed The sectors should be pre erased with the Erase Sector s command before this command...

Page 71: ...Write Sector s without Erase 38h This command is similar to the Write Sector s command with the exception that an implied erase before write operation is not performed This command has the same proto...

Page 72: ...V V V V V V V V V Read Sector s V V V V V V V V V V Read Verify Sectors V V V V V V V V V V Recalibrate V V V V V Request Sense V V V V Seek V V V V V V Set Features V V V V V Set Multiple Mode V V V...

Page 73: ...1 dual voltage card conditions for 3 3V operation M 0 conditions without wait Other Conditions Information 012h DFh Device Type W Speed Type D I O device WPS 1 no WP switch Speed 7 extend bye Device...

Page 74: ...r 066h FFh End of CISTPL_VERS_1 End marker 068h 21h CISTPL_FUNCID Function ID tuple Tuple code 06Ah 02h CISTPL_LINK Link length is 2 bytes Link to next tuple 06Ch 04h TPLFID_FUNCTION Fixed disk drive...

Page 75: ...d RMS 1 byte register mask RAS 2 bytes base address Size of fields TPCC_SZ 088h 03h TPCC_LAST Last configuration entry is 03H Last entry index 08Ah 00h TPCC_RADR LSB Configuration registers are Config...

Page 76: ...PD 09Ch 55h X Mantissa Exponent Nominal voltage 5 0V 09Eh 08h Length in 256 byte units LSB Length of memory space is 2 Memory space 0A0h 00h Length in 256 byte units MSB Kbyte descr TPCE_MS 0A2h 20h X...

Page 77: ...ot required R 1 ready busy active P 0 WP not used B 0 BVD1 BVD2 not used Type 1 I O interface TPCE_IF 0BCh 99h M MS IR IO T Power M 1 misc info present MS 0 no memory space info IR 1 interrupt is used...

Page 78: ...A 0 audio not supported T 0 max twins is 0 TPCE_MI 0CCh 1Bh CISTPL_CFTABLE_ENTRY Configuration tuple Tuple code 0CEh 06h CISTPL_LINK Link length is 6 bytes Link to next tuple 0D0h 01h I D Configuratio...

Page 79: ...E_FS 0E6h 01h R DI PI AI SI HV LV NV DI no power down current PI no peak current info AI no average current info SI no static current info HV no max voltage info LV no min voltage info NV 1 nominal vo...

Page 80: ...ength is 6 bytes Link to next tuple 102h 02h I D Configuration Index I O mapped index 2 TPCE_INDX 104h 01h M MS IR IO T Power Power 1 VCC info no VPP TPCE_FS 106h 21h R DI PI AI SI HV LV NV PI 1 peak...

Page 81: ...tage info LV no min voltage info NV 1 nominal voltage info TPCE_PD 11Ah 55h X Mantissa Exponent Nominal voltage 5 0V 11Ch EAh R S E IO R 1 range follows S 1 support 16 bit hosts E 1 support 8 bit host...

Page 82: ...h 21h R DI PI AI SI HV LV NV PI 1 peak current info NV 1 nominal voltage info TPCE_PD 13Ah B5h X Mantissa Exponent X 1 extension byte present 13Ch 1Eh X Extension Nominal voltage 3 30V 13Eh 4Dh X Mant...

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