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User's Manual  l  TQMaRZG2x UM 0100  l  © 2021, TQ-Systems GmbH 

 

Page  8 

 

3.1.4 

Pinout TQMaRZG2x (continued) 

 

Table 5: 

Pinout connector X2 

Dir. 

Level 

Group 

Signal 

X2 

Signal 

Group 

Level 

Dir. 

– 

0 V 

Ground 

DGND 

A1 

B1 

DGND 

Ground 

0 V 

– 

0.8 V 

PCIE 

PCIE1_CLK_P 

A2 

B2 

PCIE0_CLK_P 

PCIE 

0.8 V 

0.8 V 

PCIE 

PCIE1_CLK_M 

A3 

B3 

PCIE0_CLK_M 

PCIE 

0.8 V 

– 

0 V 

Ground 

DGND 

A4 

B4 

DGND 

Ground 

0 V 

– 

0.8 V 

PCIE 

PCIE1_TX_P 

A5 

B5 

PCIE0_TX_P 

PCIE 

0.8 V 

0.8 V 

PCIE 

PCIE1_TX_M 

A6 

B6 

PCIE0_TX_M 

PCIE 

0.8 V 

– 

0 V 

Ground 

DGND 

A7 

B7 

DGND 

Ground 

0 V 

– 

0.8 V 

PCIE 

PCIE1_RX_P 

A8 

B8 

PCIE0_RX_P 

PCIE 

0.8 V 

0.8 V 

PCIE 

PCIE1_RX_M 

A9 

B9 

PCIE0_RX_M 

PCIE 

0.8 V 

– 

0 V 

Ground 

DGND 

A10  B10 

DGND 

Ground 

0 V 

– 

– 

0 V 

Ground 

DGND 

A11  B11 

DGND 

Ground 

0 V 

– 

0.8 V 

USB 3.0 

USB3S0_TX_P 

A12  B12 

USB3HS0_DP 

USB 3.0 

3.3 V 

IO 

0.8 V 

USB 3.0 

USB3S0_TX_M 

A13  B13 

USB3HS0_DM 

USB 3.0 

3.3 V 

IO 

– 

0 V 

Ground 

DGND 

A14  B14 

DGND 

Ground 

0 V 

– 

0.8 V 

USB 3.0 

USB3S0_RX_P 

A15  B15 

USB3S0_CLK_P 

USB 3.0 

0.8 V 

0.8 V 

USB 3.0 

USB3S0_RX_M 

A16  B16 

USB3S0_CLK_M 

USB 3.0 

0.8 V 

– 

0 V 

Ground 

DGND 

A17  B17 

DGND 

Ground 

0 V 

– 

IO 

3.3 V 

USB 2.0 

DP1 

A18  B18 

DP0 

USB 2.0 

3.3 V 

IO 

IO 

3.3 V 

USB 2.0 

DM1 

A19  B19 

DM0 

USB 2.0 

3.3 V 

IO 

– 

0 V 

Ground 

DGND 

A20  B20 

DGND 

Ground 

0 V 

– 

– 

0 V 

Ground 

DGND 

A21  B21 

DGND 

Ground 

0 V 

– 

3.3 V 

USB 2.0 

ID1 

A22  B22 

VBUS0 

USB 2.0 

5 V 

3.3 V 

USB 2.0 

USB1_PWEN 

A23  B23 

ID0 

USB 2.0 

3.3 V 

3.3 V 

USB 2.0 

USB1_OVC 

A24  B24 

USB0_PWREN 

USB 2.0 

3.3 V 

5 V 

USB 3.0 

USB3HS0_VBUS 

A25  B25 

USB0_OVC 

USB 2.0 

3.3 V 

3.3 V 

USB 3.0 

USB3HS0_ID 

A26  B26 

DGND 

Ground 

0 V 

– 

3.3 V 

USB 3.0 

USB30_PWEN 

A27  B27 

SD3_DAT3_CON 

SD 

1.8 / 3.3 V 

IO 

3.3 V 

USB 3.0 

USB30_OVC 

A28  B28 

SD3_DAT2_CON 

SD 

1.8 / 3.3 V 

IO 

– 

0 V 

Ground 

DGND 

A29  B29 

SD3_DAT1_CON 

SD 

1.8 / 3.3 V 

IO 

1.8 / 3.3 V 

SD 

SD3_CLK_CON 

A30  B30 

SD3_DAT0_CON 

SD 

1.8 / 3.3 V 

IO 

– 

0 V 

Ground 

DGND 

A31  B31 

DGND 

Ground 

0 V 

– 

IO 

1.8 / 3.3 V 

SD 

SD3_DAT7_CON 

A32  B32 

SD3_DS_CON 

SD 

1.8 / 3.3 V 

IO 

1.8 / 3.3 V 

SD 

SD3_DAT6_CON 

A33  B33 

SD3_CMD_CON 

SD 

1.8 / 3.3 V 

IO 

IO 

1.8 / 3.3 V 

SD 

SD3_DAT5_CON 

A34  B34 

RTC_INT_OUT# 

RTC 

3.3 V 

IO 

1.8 / 3.3 V 

SD 

SD3_DAT4_CON 

A35  B35 

DGND 

Ground 

0 V 

– 

– 

0 V 

Ground 

DGND 

A36  B36 

TRST# 

DBG 

1.8 V 

3.3 V 

RTC 

V_BAT 

A37  B37 

TDI 

DBG 

1.8 V 

– 

0 V 

Ground 

DGND 

A38  B38 

TMS 

DBG 

1.8 V 

3.3 V 

SYSC 

SWD_CLK 

A39  B39 

ASEBRK 

DBG 

1.8 V 

IO 

IO 

3.3 V 

SYSC 

SWD_DIO 

A40  B40 

TDO 

DBG 

1.8 V 

– 

0 V 

Ground 

DGND 

A41  B41 

DGND 

Ground 

0 V 

– 

3.3 V 

RESET 

TQMARZG_RST_OUT# 

A42  B42 

TCK 

DBG 

1.8 V 

3.3 V 

RESET 

TQMARZG_RST_IN# 

A43  B43 

JTAG_SRST# 

SYSC 

3.3 V 

– 

0 V 

Ground 

DGND 

A44  B44 

DGND 

Ground 

0 V 

– 

3.3 V 

SYSC 

PGOOD 

A45  B45 

USB_EXTAL_CON 

USB 

1.8 V 

3.3 V 

SYSC 

BOOT_CFG# 

A46  B46 

DGND 

Ground 

0 V 

– 

– 

– 

RESERVED 

RFU0 

A47  B47 

SYSC_UART0_TX 

SYSC 

3.3 V 

– 

– 

RESERVED 

RFU1 

A48  B48 

SYSC_UART0_RX 

SYSC 

3.3 V 

– 

– 

RESERVED 

RFU2 

A49  B49 

DGND 

Ground 

0 V 

– 

1.8 V 

INTC 

NMI 

A50  B50 

EXTALR_CON 

CPG 

1.8 V 

– 

0 V 

Ground 

DGND 

A51  B51 

DGND 

Ground 

0 V 

– 

IO 

3.3 V 

GPIO 

GP6_30 

A52  B52 

FSCLKST# 

CPG 

1.8 V 

IO 

3.3 V 

GPIO 

GP6_31 

A53  B53 

DGND 

Ground 

0 V 

– 

– 

0 V 

Ground 

DGND 

A54  B54 

AUDIO_CLKB_B 

ADG 

3.3 V 

IO 

3.3 V 

SSI 

SSI_SDATA9_A 

A55  B55 

DGND 

Ground 

0 V 

– 

 

Summary of Contents for TQMaRZG2x

Page 1: ...TQMaRZG2x User s Manual TQMaRZG2x UM 0100 29 03 2021...

Page 2: ...h 5 3 1 4 Pinout TQMaRZG2x 6 3 2 Boot source 10 3 3 System components 12 3 3 1 RZ G2x 12 3 3 1 1 RZ G2x variants block diagrams 12 3 3 1 2 RZ G2x variants details 13 3 3 2 Memory 14 3 3 2 1 SDRAM 14 3...

Page 3: ...Weight 36 4 4 Connectors 36 4 5 Protection against external effects 36 4 6 Thermal management 37 4 7 Structural requirements 37 4 8 Notes of treatment 37 5 SOFTWARE 37 6 SAFETY REQUIREMENTS AND PROTE...

Page 4: ...Table 19 CSI signals 21 Table 20 Ethernet signals 21 Table 21 GPIOs 22 Table 22 I2C1 device addresses 23 Table 23 I2 C signals 23 Table 24 JTAG signals 24 Table 25 MLB signals 24 Table 26 PCIe SATA si...

Page 5: ...e 14 Figure 7 Block diagram EEPROMs 15 Figure 8 Block diagram RTC buffering 16 Figure 9 Block diagram SE050 17 Figure 10 Block diagram I2 C bus 23 Figure 11 Block diagram JTAG 24 Figure 12 Block diagr...

Page 6: ...User s Manual l TQMaRZG2x UM 0100 l 2021 TQ Systems GmbH Page V REVISION HISTORY Rev Date Name Pos Modification 0100 29 03 2021 Petz First edition...

Page 7: ...ademarks are rightly protected by a third party 1 3 Disclaimer TQ Systems GmbH does not guarantee that the information in this User s Manual is up to date correct complete or of good quality Nor does...

Page 8: ...d This symbol represents important details or aspects for working with TQ products Command A font with fixed width is used to denote commands contents file names or menu items 1 7 Handling and ESD tip...

Page 9: ...d The manufacturer s specifications of the components used for example CompactFlash cards are to be taken note of They contain if applicable additional information that must be taken note of for safe...

Page 10: ...ectors There are therefore no restrictions for customers using the TQMaRZG2x with respect to an integrated customised design The functionality of the different TQMaRZG2x is mainly determined by the fe...

Page 11: ...ended impedance of nominal 50 10 Depending on the interface other impedances are also used on the TQMaRZG2x The following table shows the affected interfaces Table 2 Impedances Interface Signal type I...

Page 12: ...V LVDS LVDS0_CH2_P A25 B25 LVDS0_CH0_P LVDS 1 8 V O O 1 8 V LVDS LVDS0_CH2_N A26 B26 LVDS0_CH0_N LVDS 1 8 V O 0 V Ground DGND A27 B27 DGND Ground 0 V O 1 8 V LVDS LVDS0_CH3_P A28 B28 LVDS0_CH1_P LVDS...

Page 13: ...Ground DGND A83 B83 IRQ3 INTC 3 3 V I I 3 3 V INTC IRQ5 A84 B84 IRQ4 INTC 3 3 V I O 3 3 V PWM PWM A85 B85 DGND Ground 0 V O 3 3 V PWM PWM1_A A86 B86 AVB_TXCREFCLK EtherAVB 3 3 V I O 3 3 V PWM PWM2_A...

Page 14: ...3 V O I 5 V USB 3 0 USB3HS0_VBUS A25 B25 USB0_OVC USB 2 0 3 3 V I I 3 3 V USB 3 0 USB3HS0_ID A26 B26 DGND Ground 0 V O 3 3 V USB 3 0 USB30_PWEN A27 B27 SD3_DAT3_CON SD 1 8 3 3 V IO I 3 3 V USB 3 0 USB...

Page 15: ...DGND A80 B80 DGND Ground 0 V O 3 3 V SCIF TX1_A A81 B81 MLB_CLK MLB 3 3 V I I 3 3 V SCIF RX1_A A82 B82 MLB_DAT MLB 3 3 V IO IO 3 3 V SCIF CTS1 A83 B83 MLB_SIG MLB 3 3 V IO IO 3 3 V SCIF RTS1 A84 B84...

Page 16: ...s recommended to switch the boot strap pins to high impedance after read in MDT 1 0 RZ G2x Pin Strapping Active driver during RESET High Z during normal operation PORESET RST_IN System Controller MD 2...

Page 17: ...B65 MD10 X1 B75 MD19 X1 A75 00 DDR3200 01 DDR2800 10 Setting prohibited 11 DDR1600 00 MD17 X1 A77 MD18 X1 A76 0 PLL1 division ratio 1 24 1 PLL1 division ratio 1 36 0 MD16 X1 A78 Reserved fixed to 1 1...

Page 18: ...l TQMaRZG2x UM 0100 l 2021 TQ Systems GmbH Page 12 3 3 System components 3 3 1 RZ G2x 3 3 1 1 RZ G2x variants block diagrams Figure 3 Block diagram RZ G2H Source Renesas Figure 4 Block diagram RZ G2M...

Page 19: ...eo in 2 MIPI CSI2 2 Digital RGB YCbCr 2 MIPI CSI2 2 Digital RGB YCbCr 2 MIPI CSI2 2 Digital RGB YCbCr up to 8 input image can be captured up to 8 input image can be captured up to 8 input image can be...

Page 20: ...a 1 8 V eMMC can be connected on the carrier board RZ G2x SD3_CLK Connector NP eMMC NP NP NP CLK CMD DS DAT 7 0 RST SD3_CMD SD3_DS SD3_DAT 7 0 PRESET Figure 6 Block diagram eMMC interface The TQMaRZG...

Page 21: ...ROM SE97BTP The temperature sensor SE97BTP contains a 2 Kbit 256 8 Bit EEPROM For details about the temperature sensor see 3 3 4 The SE97BTP is controlled by the RZ G2x I2 C bus IIC_DVFS device addres...

Page 22: ...on or malfunction prohibited charging of coin cells If the TQMaRZG2x is supplied with 5 V V_5V_IN V_BAT is supplied from 3 3 V generated on the TQMaRZG2x V_BAT can be used to charge GoldCaps If coin c...

Page 23: ...S 3 3 V I2C VIN VCC VOUT LB IO1 CLK RST IO2 LA 1 8 V 3 3 V ENA 3 3 V X2 A103 X2 A104 X2 A105 X2 A106 X2 A107 X2 A108 X2 A109 Connector Figure 9 Block diagram SE050 The Secure Element has I2 C address...

Page 24: ...3 X2 A88 3 4 2 CAN The RZ G2x provides two CAN controllers that support CAN FD Depending on the multiplexing the following signals are primarily available Table 14 CAN signals Signal TQMaRZG2x Power g...

Page 25: ...ailable Table 16 24 bit RGB signals Signal TQMaRZG2x Power group DU_DB7 X1 A68 3 3 V DU_DB6 X1 A67 DU_DB5 X1 A66 DU_DB4 X1 A65 DU_DB3 X1 A64 DU_DB2 X1 A63 DU_DB1 X1 A62 DU_DB0 X1 A61 DU_DG7 X1 A77 DU_...

Page 26: ...M X1 B20 HDMI0_TX0_P X1 B19 HDMI0_CLK_M X1 A20 HDMI0_CLK_P X1 A19 HDMI0_SCL X1 B22 HDMI0_SDA X1 B23 HDMI0_HPD X1 A22 5 V HDMI0_CEC X1 A23 3 3 V 3 4 4 3 LVDS The RZ G2x provides a dedicated LVDS interf...

Page 27: ...A38 CSI1_DATA1_M X1 B46 CSI1_DATA1_P X1 B45 CSI1_DATA0_M X1 B43 CSI1_DATA0_P X1 B42 CSI1_CLK_M X1 A43 CSI1_CLK_P X1 A42 3 4 6 Ethernet The RZ G2x offers an EthernetAVB interface which has an Ethernet...

Page 28: ...VDS0_RST X1 B66 LCD_PWR_EN X1 B67 LCD_BLT_EN X1 B68 PCIE1_SATA_SEL X1 A71 PCIE1_RST X2 A23 PCIE1_WAKE X2 A24 AUDIO_CODEC_RST X2 A27 PCIE1_CLK_REQ X2 A28 CSI0_MCLK_OUT X2 A52 CSI1_MCLK_OUT X2 A53 M2_PE...

Page 29: ...sses of all I2 C devices Table 22 I2C1 device addresses Device Function 7 bit address Remark 24LC64T EEPROM 0x50 101 0000b For general usage MKL04Z16 System Controller 0x11 001 0001b Should not be alt...

Page 30: ...ovided on the carrier board The following figure shows the JTAG interface on the module TDO RZ G2x JTAG TCK TMS TDI TRSTN 1 8 V NP NP Figure 11 Block diagram JTAG The following signals are primarily a...

Page 31: ..._M X2 B3 0 8 V PCIE0_CPU_CLK_P X2 B2 0 8 V PCIE0_TX_M X2 B6 0 8 V PCIE0_TX_P X2 B5 0 8 V PCIE0_RX_M X2 B9 0 8 V PCIE0_RX_P X2 B8 0 8 V PCIE1_CPU_CLK_M X2 A3 0 8 V Can be muxed as SATA PCIE1_CPU_CLK_P...

Page 32: ...xternal source The TQMaRZG2x provides suitable voltages at the connectors V_1V8 or V_3V3 SD1_WP X2 B96 SD1_CMD X2 B97 SD1_DAT3 X2 B94 SD1_DAT2 X2 B93 SD1_DAT1 X2 B92 SD1_DAT0 X2 B91 SD1_CLK X2 B99 SD2...

Page 33: ...l PHY All controllers are OTG resp DRD capable The following signals are primarily available Table 31 USB signals Signal TQMaRZG2x Power group Remark USB30_DM X2 B13 3 3 V USB30_DP X2 B12 3 3 V USB30_...

Page 34: ...D3 V_BAT 0 9 V to 3 6 V See 3 3 3 Supply for TQMaRZG2x RTC VBUS0 Typ 5 V 1 mA Serves to detect the USB VBUS voltage Supplied by VBUS switched by the USB host VBUS must be connected to 30 k in series o...

Page 35: ...3 3 V generated on the TQMaRZG2x are available at the connectors for this purpose The following table shows the supply outputs provided by the TQMaRZG2x that can be used on the carrier board Table 35...

Page 36: ...e switched to Self Refresh mode with an SRE command IDD6 is specified in Self Refresh typical current consumption at 25 C ambient temperature is approx 0 4 mA 2 7 mA Stop Mode The TQMaRZG2x must still...

Page 37: ...al is LOW during the reset phase and goes after PRESETOUT became HIGH delayed also on HIGH This signals the carrier board that the boot strap signals can be switched to high impedance PGOOD PGOOD sign...

Page 38: ..._RST_IN to High the power up sequence of the TQMaRZG2x starts After the successful completion of the power up sequence PGOOD signals by a high level that circuit parts on the carrier board can be supp...

Page 39: ...ICS 4 1 Assembly Figure 14 TQMaRZG2x assembly top The labels on the TQMaRZG2x show the following information Table 38 Labels on TQMaRZG2x Label Content AK1 MAC address tests performed AK2 TQMaRZG2x ve...

Page 40: ...ZG2x heights Dim Value Tolerance Remark A 5 10 mm 0 07 mm Board to board distance B 1 48 mm 0 15 mm PCB thickness C 2 85 mm 0 20 mm CPU RZ G2H C 2 20 mm 0 15 mm CPUs RZ G2M RZ G2N C1 3 00 mm 0 05 mm I...

Page 41: ...l TQMaRZG2x UM 0100 l 2021 TQ Systems GmbH Page 35 4 2 Dimensions continued Figure 18 Dimensions TQMaRZG2H Figure 19 Dimensions TQMaRZG2M TQMaRZG2N 3D STEP models are available on request Please conta...

Page 42: ...lacement on carrier board 2 5 mm should be kept free on the carrier board on both long sides of the TQMaRZG2x for the extraction tool MOZIaRZG2x The following table shows suitable carrier board mating...

Page 43: ...the TQMaRZG2M TQMaRZG2N TQMaRZG2M_HSP Please contact your local sales representative 4 7 Structural requirements The TQMaRZG2x is held in the mating connectors by the retention force of the pins 440 F...

Page 44: ...spersion on the signal path from the input to the protection circuit in the system the protection against electrostatic discharge should be arranged directly at the inputs of a system As these measure...

Page 45: ...t is the user s sole responsibility to define a suitable heat sink weight and mounting position depending on the specific mode of operation e g dependence on clock frequency stack height airflow and s...

Page 46: ...Battery No batteries are assembled on the TQMaRZG2x 7 6 Packaging The TQMaRZG2x is delivered in reusable packaging 7 7 Other entries By environmentally friendly processes production equipment and pro...

Page 47: ...le Programmable Read only Memory EMC Electromagnetic Compatibility eMMC embedded Multi Media Card EN Europ ische Norm European standard ESD Electrostatic Discharge EuP Energy using Products FD Flexibl...

Page 48: ...micals RF Radio Frequency RFU Reserved for Future Use RGB Red Green Blue RoHS Restriction of the use of certain Hazardous Substances ROM Read Only Memory RTC Real Time Clock RWP Reversible Write Prote...

Page 49: ...8 2 References Table 45 Further applicable documents No Name Rev Date Company 1 RZ G2x Data Sheet Renesas 2 RZ G Series 2nd Generation User s Manual Rev 1 00 Mar 2020 Renesas 3 MBaRZG2x User s Manual...

Page 50: ...TQ Systems GmbH M hlstra e 2 l Gut Delling l 82229 Seefeld Info TQ Group TQ Group...

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