User's Manual l TQMa335xL UM 0101 l © 2019, TQ-Systems GmbH
Page 11
3.2.2
Memory
3.2.2.1
DDR3L SDRAM
The TQMa335xL is equipped with one DDR3L SDRAM chip with a data bus width of 16 bits.
The AM335x supports 303 to 400 MHz bus clock. In the
BSP provided by TQ-Systems GmbH
the memory is clocked with 400 MHz.
The following block diagram shows how the DDR3L SDRAM is connected to the AM335x.
AM335x
A[15:0]
D[15:0]
CS0#
CTRL
CLK0
DQM0
DDR3L SDRAM
A[15:0]
D[15:0]
CS0#
CTRL
CLK0
DQM0
DQM1
DQM1
BA[0:2]
BA[0:2]
Illustration 4:
Block diagram DDR3L SDRAM connection
The TQMa335xL can be equipped with 256 Mbyte or 512 Mbyte of DDR3L SDRAM:
Table 9:
DDR3L SDRAM
Placement option
Size
1 × DDR3L 128M16
256 Mbyte
1 × DDR3L 256M16
512 Mbyte
The SDRAM is mapped to the following address:
Table 10:
SDRAM address space
Start address
Size
Chip Select
Remark
0x8000_0000
0x4000_0000
CS0#
1 Gbyte
3.2.2.2
eMMC NAND flash
The eMMC NAND flash on the TQMa335xL contains the boot loader and the application software.
The following block diagram shows how the eMMC flash is connected to the AM335x.
AM335x
eMMC
MMCHS1_CLK
MMCHS1_CMD
CLK
CMD
MMCHS1_DAT[7:0]
DAT[7:0]
RESET#
WARMRST#
Illustration 5:
Block diagram eMMC flash connection
