User's Manual l TQMa335xL UM 0101 l © 2019, TQ-Systems GmbH
Page 19
3.2.4.13
I2S / AUDMUX
The Multichannel Audio Serial Port 0 (MCASP0) is routed to the TQMa335xL pads to connect an audio-codec via I
2
S.
The following table shows the signals used by the AUD3 interface.
Table 25:
MCASP0 signals
TQMa335xL pad
Signal
Pad
Dir.
AM335x ball
Remark
C16
MCASP0_ACLKR
MCASP0_ACLKR
I/O
B12
–
C15
MCASP0_ACLKX
MCASP0_ACLKX
I/O
A13
–
B17
MCASP0_FSX
MCASP0_FSX
I/O
B13
–
C17
MCASP0_FSR
MCASP0_FSR
I/O
C13
–
B15
MCASP0_AXR3
MCASP0_AXR3
I/O
A14
–
A15
MCASP0_AXR2
MCASP0_AXR2
I/O
C12
–
B16
MCASP0_AXR1
MCASP0_AXR1
I/O
D13
–
A16
MCASP0_AXR0
MCASP0_AXR0
I/O
D12
–
The MCASP-Interface supports I2S and other synchronous modes.
More information can be found in the AM335x Reference Manual (3).
3.2.4.14
SPI
The AM335x provides two MCSPIs (Multichannel Serial Port Interface). Both interfaces are routed to the TQMa335xL pads.
The following table shows the signals used by the SPI0 and SPI1 interfaces.
Table 26:
SPI0 and SPI1 signals
TQMa335xL pad
Signal
Pad
Dir.
AM335x ball
Remark
F14
SPI0_CS0#
SPI0_CS0#
I/O
A16
CS
G14
SPI0_SCLK
SPI0_SCLK
I/O
A17
CLK
J14
SPI0_MOSI
SPI0_D1
I/O
B16
MOSI
H14
SPI0_MISO
SPI0_D0
I/O
B17
MISO
N15
SPI1_CS0#
RMII1_REF_CLK
I/O
H18
–
P14
SPI1_SCLK
MII1_COL
I/O
H16
–
N14
SPI1_MOSI
MII1_CRS
I/O
H17
SPI1_D0
M14
SPI1_MISO
MII1_RX_ER
I/O
J15
SPI1_D1
Note: SPI0 as boot device
SPI0 can be configured as boot device.
An SPI NOR flash can be assembled on the carrier board.
