User's Manual l TQMLS10xxA UM 0105 l © 2022, TQ-Systems GmbH
Page 13
4.8
Reset structure
If RESIN# is disabled, the Board Controller starts the initialization of the TQMLS10xxA.
If no errors occur during initialization and when power supplies are OK, the CPU is started via PORESET#.
RESET# is provided at the TQMLS10xxA connector via signal RESET_OUT#.
PORESET# should not be connected at the TQMLS10xxA connector.
A red LED (V26) signals the RESET# state.
HRESET# of the CPU is directly available at the TQMLS10xxA connector (4.7 kΩ Pull-Up to 1.8 V).
CPU signal RESET_REQ# is processed by the Board Controller and routed to the TQMLS10xxA connectors.
CPLD
Reset
Monitor
RESIN#
LS10xxA
PORESET#
PORESET#
Board
Controller
RESET_OUT#
V26
CPLD
Voltage Monitoring
PGOOD
SYSC_POR#
RESET_REQ#
Open
Drain
RESET_REQ_OUT#
JTAG_TRST#
DDR4
DDR4_RST_EN
TQMLS10xxA
connectors
Figure 10: Block diagram Reset structure
•
RESIN# keeps the TQMLS10xxA in RESET#
•
Further RESET# sources are:
o
By software via Board Controller
o
By software via CPU RESET_REQ
o
V
IN
Power Fail
Table 5:
RESET options
Wiring at RESIN#
Reset function
Open Drain
Self-reset possible
Logic Low at RESIN# triggers RESET
Open, or Pull-Up ≥47 k
Ω
to VCC3V3
Self-reset possible
RESET_REQ_OUT# can trigger RESIN# on TQMLS10xxA
Pull-Up <10 k
Ω
to VCC3V3
No self-reset possible
RESET_REQ_OUT# cannot trigger RESIN# on TQMLS10xxA
Push/Pull driver
No self-reset, but external RESET possible
Logic High at RESIN# overrides RESET_REQ_OUT# on TQMLS10xxA
