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User's Manual l STK-MBa53 UM 100 l © 2013 TQ-Group
Page 10
Table 8:
Pin assignment module connector X2
Ball
I/O
Level
Group
Signal
Pin
Signal
Group
Level
I/O
Ball
–
P
5 V
POWER
VCC5V
1
2
VCC5V
POWER
5 V
P
–
–
P
5 V
POWER
VCC5V
3
4
VCC5V
POWER
5 V
P
–
–
P
5 V
POWER
VCC5V
5
6
VCC5V
POWER
5 V
P
–
–
P
0 V
POWER
DGND
7
8
DGND
POWER
0 V
P
–
–
P
0 V
POWER
DGND
9
10
DGND
POWER
0 V
P
–
–
P
0 V
POWER
DGND
11
12
DGND
POWER
0 V
P
–
K04
[
∗
]
AI
2.4 V
TOUCH
TSX1
13
14
TSY1
TOUCH
2.4 V
AI
J07
[
∗
]
L05
[
∗
]
AI
2.4 V
TOUCH
TSX2
15
16
TSY2
TOUCH
2.4 V
AI
J06
[
∗
]
–
P
0 V
POWER
DGND
17
18
DGND
POWER
0 V
P
–
A11
[
∗
]
P
3.3 V
PMIC
LICELL
19
20
GLBRST#
PMIC
3.3 V
I
IPU
G07
[
∗
]
G08
[
∗
]
I
IPU
1.5 V
PMIC
PWRON
21
22
RESET_OUT#
PMIC
3.3 V
O
OD
–
L03
O
3.3 V
LCD
LCD_BLT_EN
23
24
LCD_PWR_EN
LCD
3.3 V
O
M04
B07
O
3.3 V
LCD
LCD_CONTRAST
25
26
LCD_RESET
LCD
3.3 V
O
L04
–
P
0 V
POWER
DGND
27
28
DGND
POWER
0 V
P
–
J01
O
3.3 V
UART2
UART2_TXD
29
30
UART1_RXD
UART1
3.3 V
I
J02
K04
I
3.3 V
UART2
UART2_RXD
31
32
UART1_TXD
UART1
3.3 V
O
J03
K03
I
3.3 V
UART2
UART2_RTS#
33
34
UART3_RXD
UART3
3.3 V
I
L02
K05
O
3.3 V
UART2
UART2_CTS#
35
36
UART3_TXD
UART3
3.3 V
O
L05
–
P
0 V
POWER
DGND
37
38
DGND
POWER
0 V
P
–
E05
O
3.3 V
CAN2
CAN2_TX
39
40
CAN1_TX
CAN1
3.3 V
O
C04
E06
I
3.3 V
CAN2
CAN2_RX
41
42
CAN1_RX
CAN1
3.3 V
I
D05
D06
I
3.3 V
I2S
I2S_DIN
43
44
I2S_SCLK
I2S
3.3 V
O
C05
E07
O
3.3 V
I2S
I2S_LRCLK
45
46
I2S_DOUT
I2S
3.3 V
O
B03
–
P
0 V
POWER
DGND
47
48
DGND
POWER
0 V
P
–
C08
O
3.3 V
I2S
I2S_MCLK
49
50
SPDIF_OUT
SPDIF
3.3 V
O
A03
–
P
0 V
POWER
DGND
51
52
SPDIF_IN
SPDIF
3.3 V
I
C06
B05
O
3.3 V
FIRI
FIRI_TXD
53
54
FIRI_RXD
FIRI
3.3 V
I
A04
D04
I/O
PU
3.3 V
I2C2
I2C2_SDA
55
56
I2C3_SDA
I2C3
3.3 V
I/O
B06
F06
I/O
PU
3.3 V
I2C2
I2C2_SCL
57
58
I2C3_SCL
I2C3
3.3 V
I/O
A05
–
P
0 V
POWER
DGND
59
60
DGND
POWER
0 V
P
–
A06
I/O
3.3 V
GPIO
GPIO1_GPIO3
61
62
OWIRE
1-WIRE
3.3 V
I/O
D07
A07
O
2.775 V
JTAG
JTAG_TDO
63
64
RESET_IN#
CONFIG
3.3 V
I
PU
–
A08
I
PU
2.775 V
JTAG
JTAG_TMS
65
66
JTAG_TDI
JTAG
2.775 V
I
PU
B08
E09
I
PU
2.775 V
JTAG
JTAG_TRST#
67
68
JTAG_TCK
JTAG
2.775 V
I
PD
D09
–
P
0 V
POWER
DGND
69
70
DGND
POWER
0 V
P
–
A10
O
[
2
]
SATA
SATA_TXP
71
72
SATA_RXP
SATA
[2]
I
B12
B10
O
[2]
SATA
SATA_TXM
73
74
SATA_RXM
SATA
[2]
I
A12
–
P
0 V
POWER
DGND
75
76
DGND
POWER
0 V
P
–
M05
I
3.3 V
FEC
FEC_INT#
77
78
FEC_RST#
FEC
3.3 V
O
K06
C10
O
3.3 V
FEC
FEC_TX_EN
79
80
FEC_RXD0
FEC
3.3 V
I
C11
F10
O
3.3 V
FEC
FEC_TXD0
81
82
FEC_RXD1
FEC
3.3 V
I
E11
D10
O
3.3 V
FEC
FEC_TXD1
83
84
FEC_RX_DV
FEC
3.3 V
I
D11
E10
O
3.3 V
FEC
FEC_MDC
85
86
FEC_MDIO
FEC
3.3 V
I/O
PU
D12
F12
I
3.3 V
FEC
FEC_RX_ER
87
88
FEC_REF_CLK
FEC
3.3 V
I
E12
–
P
0 V
POWER
DGND
89
90
DGND
POWER
0 V
P
–
C07
I
3.3 V
SD
SD_WP
91
92
SD_DAT0
SD
3.3 V
I/O
D13
D08
I
3.3 V
SD
SD_CD#
93
94
SD_DAT1
SD
3.3 V
I/O
C14
C15
I/O
3.3 V
SD
SD_CMD
95
96
SD_DAT2
SD
3.3 V
I/O
D14
E14
O
3.3 V
SD
SD_CLK
97
98
SD_DAT3
SD
3.3 V
I/O
E13
–
P
0 V
POWER
DGND
99
100
DGND
POWER
0 V
P
–
A19
I/O
[
3
]
USBOTG
USB_OTG_DN
101
102
USB_H1_DN
USBH1
[3]
I/O
B17
B19
I/O
[3]
USBOTG
USB_OTG_DP
103
104
USB_H1_DP
USBH1
[3]
I/O
A17
–
P
0 V
POWER
DGND
105
106
DGND
POWER
0 V
P
–
C16
I
3.3 V
USBOTG
USB_OTG_ID
107
108
USB_H1_VBUS
USBH1
5.0 V
AI
D15
E15
AI
5.0 V
USBOTG
USB_OTG_VBUS
109
110
BOOT_MODE0
CONFIG
2.775 V
I
PD
C18
–
P
2.775 V
POWER
VCC2V775
111
112
BOOT_MODE1
CONFIG
2.775 V
I
PU
B20
C17
O
3.3 V
SPI
SPI_SS0#
113
114
SPI_SS2#
SPI
3.3 V
O
F16
A20
I
3.3 V
SPI
SPI_MISO
115
116
SPI_SS1#
SPI
3.3 V
O
F17
E16
O
3.3 V
SPI
SPI_SCLK
117
118
SPI_MOSI
SPI
3.3 V
O
F18
–
P
0 V
POWER
DGND
119
120
DGND
POWER
0 V
P
–
∗
No. of PMIC ball.
2
See (3), Serial ATA specification 2.6.
3
See (4), USB 2.0 specification.