User's Manual l STK-MBa53 UM 100 l © 2013 TQ-Group
Page 9
Table 7:
Pin assignment module connector X1
Ball
I/O
Level
Group
Signal
Pin
Signal
Group
Level
I/O
Ball
–
P
0 V
POWER
DGND
1
2
DGND
POWER
0 V
P
–
P02
I
3.3 V
CSI0
CSI0_HSYNC
3
4
CSI0_PIXCLK
CSI0
3.3 V
I
P01
P04
I
3.3 V
CSI0
CSI0_VSYNC
5
6
DGND
POWER
0 V
P
–
–
P
0 V
POWER
DGND
7
8
CSI0_DATA_EN
CSI0
3.3 V
I
P03
R01
I
3.3 V
CSI0
CSI0_D4
9
10
CSI0_D5
CSI0
3.3 V
I
R02
R06
I
3.3 V
CSI0
CSI0_D6
11
12
CSI0_D7
CSI0
3.3 V
I
R03
T01
I
3.3 V
CSI0
CSI0_D8
13
14
CSI0_D9
CSI0
3.3 V
I
R04
R05
I
3.3 V
CSI0
CSI0_D10
15
16
CSI0_D11
CSI0
3.3 V
I
T02
T03
I
3.3 V
CSI0
CSI0_D12
17
18
CSI0_D13
CSI0
3.3 V
I
T06
U01
I
3.3 V
CSI0
CSI0_D14
19
20
CSI0_D15
CSI0
3.3 V
I
U02
T04
I
3.3 V
CSI0
CSI0_D16
21
22
CSI0_D17
CSI0
3.3 V
I
T05
U03
I
3.3 V
CSI0
CSI0_D18
23
24
CSI0_D19
CSI0
3.3 V
I
U04
P05
I
3.3 V
CSI0
CSI0_PWDN
25
26
CSI0_MCLK
CSI0
3.3 V
I
V14
P06
I
3.3 V
CSI0
CSI0_RST#
27
28
DGND
POWER
0 V
P
–
–
P
0 V
POWER
DGND
29
30
GPIO3_GPIO20
GPIO
3.3 V
I/O
W01
AA01
I/O
3.3 V
GPIO
GPIO3_GPIO28
31
32
GPIO3_GPIO29
GPIO
3.3 V
I/O
AA02
W02
I/O
3.3 V
GPIO
GPIO3_GPIO22
33
34
GPIO3_GPIO21
GPIO
3.3 V
I/O
V03
AB04
I/O
3.3 V
GPIO
GPIO2_GPIO26
35
36
GPIO2_GPIO27
GPIO
3.3 V
I/O
AA06
V08
I/O
3.3 V
GPIO
GPIO2_GPIO25
37
38
GPIO2_GPIO23
GPIO
3.3 V
I/O
W08
AC06
I/O
3.3 V
GPIO
GPIO3_GPIO11
39
40
GPIO3_GPIO13
GPIO
3.3 V
I/O
AC07
AB09
I/O
3.3 V
GPIO
GPIO5_GPIO0
41
42
GPIO3_GPIO14
GPIO
3.3 V
I/O
Y10
U05
I
3.3 V
ESPI
ESPI_MISO
43
44
GPIO3_GPIO12
GPIO
3.3 V
I/O
V10
V01
O
3.3 V
ESPI
ESPI_MOSI
45
46
ESPI_SS1#
ECSPI1
3.3 V
O
V02
Y02
O
3.3 V
ESPI
ESPI_SS2#
47
48
ESPI_SS0#
ECSPI1
3.3 V
O
Y03
–
P
0 V
POWER
DGND
49
50
ESPI_SS3#
ECSPI1
3.3 V
O
W03
AB07
O
3.3 V
DISP1
DISP1_DRDY_DE
51
52
DGND
POWER
0 V
P
–
AA08
O
3.3 V
DISP1
DISP1_DAT1
53
54
ESPI_SCLK
ECSPI1
3.3 V
O
U06
Y09
O
3.3 V
DISP1
DISP1_DAT3
55
56
DISP1_CLK
DISP1
3.3 V
O
AA05
AB06
O
3.3 V
DISP1
DISP1_DAT5
57
58
DGND
POWER
0 V
P
–
AA07
O
3.3 V
DISP1
DISP1_DAT7
59
60
DISP1_HSYNC
DISP1
3.3 V
O
Y01
Y08
O
3.3 V
DISP1
DISP1_DAT9
61
62
DISP1_VSYNC
DISP1
3.3 V
O
Y04
AC03
O
3.3 V
DISP1
DISP1_DAT11
63
64
DGND
POWER
0 V
P
–
AB03
O
3.3 V
DISP1
DISP1_DAT13
65
66
DISP1_DAT0
DISP1
3.3 V
O
W10
Y06
O
3.3 V
DISP1
DISP1_DAT15
67
68
DISP1_DAT2
DISP1
3.3 V
O
AC05
AA03
O
3.3 V
DISP1
DISP1_DAT17
69
70
DISP1_DAT4
DISP1
3.3 V
O
V09
Y05
O
3.3 V
DISP1
DISP1_DAT19
71
72
DISP1_DAT6
DISP1
3.3 V
O
W09
W04
O
3.3 V
DISP1
DISP1_DAT21
73
74
DISP1_DAT8
DISP1
3.3 V
O
AC04
V04
O
3.3 V
DISP1
DISP1_DAT23
75
76
DISP1_DAT10
DISP1
3.3 V
O
AB05
–
P
0 V
POWER
DGND
77
78
DISP1_DAT12
DISP1
3.3 V
O
V07
AA09
O
3.3 V
VGA
VGA_HSYNC
79
80
DISP1_DAT14
DISP1
3.3 V
O
W07
Y07
O
3.3 V
VGA
VGA_VSYNC
81
82
DISP1_DAT16
DISP1
3.3 V
O
AA04
AC19
AO
0.7 V
VGA
TVDAC_IOB
83
84
DISP1_DAT18
DISP1
3.3 V
O
V06
AB20
AO
0.7 V
VGA
TVDAC_IOG
85
86
DISP1_DAT20
DISP1
3.3 V
O
W05
AC21
AO
0.7 V
VGA
TVDAC_IOR
87
88
DISP1_DAT22
DISP1
3.3 V
O
V05
–
P
0 V
POWER
DGND
89
90
DGND
POWER
0 V
P
–
AC16
O
1.2 V
LVDS0
LVDS0_CLK_P
91
92
LVDS1_CLK_P
LVDS1
1.2 V
O
Y13
AB16
O
1.2 V
LVDS0
LVDS0_CLK_N
93
94
LVDS1_CLK_N
LVDS1
1.2 V
O
AA13
–
P
0 V
POWER
DGND
95
96
DGND
POWER
0 V
P
–
AA17
O
1.2 V
LVDS0
LVDS0_TX0_P
97
98
LVDS1_TX0_P
LVDS1
1.2 V
O
AB14
Y17
O
1.2 V
LVDS0
LVDS0_TX0_N
99
100
LVDS1_TX0_N
LVDS1
1.2 V
O
AC14
–
P
0 V
POWER
DGND
101
102
DGND
POWER
0 V
P
–
AC17
O
1.2 V
LVDS0
LVDS0_TX1_P
103
104
LVDS1_TX1_P
LVDS1
1.2 V
O
AB13
AB17
O
1.2 V
LVDS0
LVDS0_TX1_N
105
106
LVDS1_TX1_N
LVDS1
1.2 V
O
AC13
–
P
0 V
POWER
DGND
107
108
DGND
POWER
0 V
P
–
AA16
O
1.2 V
LVDS0
LVDS0_TX2_P
109
110
LVDS1_TX2_P
LVDS1
1.2 V
O
AB12
Y16
O
1.2 V
LVDS0
LVDS0_TX2_N
111
112
LVDS1_TX2_N
LVDS1
1.2 V
O
AC12
–
P
0 V
POWER
DGND
113
114
DGND
POWER
0 V
P
–
AC15
O
1.2 V
LVDS0
LVDS0_TX3_P
115
116
LVDS1_TX3_P
LVDS1
1.2 V
O
Y12
AB15
O
1.2 V
LVDS0
LVDS0_TX3_N
117
118
LVDS1_TX3_N
LVDS1
1.2 V
O
AA12
–
P
0 V
POWER
DGND
119
120
DGND
POWER
0 V
P
–
