33
•
From the following data table we find that the addressing for node 3 frequency is register
40102. We place 3000 (frequency x 100) into that register.
ADDRESS
NODE
FUNCTION
ADDRESS
NODE
FUNCTION
40100
2
Frequency (x100)
40116
10
Frequency (x100)
40101
2
Input Command
40117
10
Input Command
40102
3
Frequency (x100)
40118
11
Frequency (x100)
40103
3
Input Command
40119
11
Input Command
40104
4
Frequency (x100)
40120
12
Frequency (x100)
40105
4
Input Command
40121
12
Input Command
40106
5
Frequency (x100)
40122
13
Frequency (x100)
40107
5
Input Command
40123
13
Input Command
40108
6
Frequency (x100)
40124
14
Frequency (x100)
40109
6
Input Command
40125
14
Input Command
40110
7
Frequency (x100)
40126
15
Frequency (x100)
40111
7
Input Command
40127
15
Input Command
40112
8
Frequency (x100)
40128
16
Frequency (x100)
40113
8
Input Command
40129
16
Input Command
40114
9
Frequency (x100)
40130
17
Frequency (x100)
40115
9
Input Command
40131
17
Input Command
•
The register for node 3 status command (from the above table) is 40103. From the table below
we determine that for the inverter to run in
reverse
using
#2 acc/dec
pattern we must place a
C009 (hex) into that register.
Global Input Command Enable
Global Frequency Command Enable
Clear Fault Command
Emergency Stop Command
Coast to a Stop Command
Fundamental Parrameter Selection
DC Injection Command
Feedback Enabled Command
Jog Command
Reserved
Reserved
Reserved
Acc/Dec #1 or #2 Command
Forward or Reverse Commnad
Stop Command
Run/Stop Command
address/bit
F
E
D C B A
9
8
7
6
5
4
3
2
1
0
40103
1
1
0
0
0
0
0
0
0
0
0
0
1
0
0
1 Hex C009
C
0
0
9
NOTE:
If the last global write to a node includes a 1 in either the Global Input Command
Enable (bit F) or the Global Frequency Command Enable (bit E), then the inverter at that
node address will not accept any frequency or status commands from a regular write
command (MSTR function 1) until these bits are changed to a 0 and the global write
command is resent. Regular read commands (MSTR function 2) are also overriden while
the Global write command bits are set.