Toshiba Satellite L20, Maintenance Manual

Page: 93 / 264

Test Program for Field.
Satellite L20 Maintenance Manual(960-Q01) 93
5. Address pattern test
“16 bit write and 16 bit read” of address pattern data is executed and
the new data is compared with the original data.
Test data = 0000H, 0004H, 0008H, 000CH,...8000H, 8004H, through
FFECH
Subtest 02 Protected Mode
This subtest first writes data patterns and address data from 1 to 32 MB, then
reads the new data and compares the result with the original data patterns.
Addresses are displayed in 64KB increments during the test.
. Test Process:
1. Switch to Protected Mode. (INT 15H)
2.
Tests 256KB - 640KB and 1MB to 32MB of installed memory.
Executes Step 1 through Step 5 of Subtest 1. The test data is the same
as Subtest 1.
Subtest 03 Protected Mode [32MB - MAX]
This subtest first writes data patterns and address data from 32MB to the
maximum installed memory, reads the new data, and then compares the result
with the original data patterns. Addresses are displayed in 64KB increments
during the test.
Test Process:
1. Switch to Protected Mode. (INT 15H)
2.
Tests from 32MB to the maximum installed memory (extended
memory). Executes Step 1 through Step 5 of Subtest 1. The test data is
the same as Subtest 1.
Subtest 04 RAM Refresh
This subtest writes a data pattern (CCAA5533H ) in 4KB from 0 to the
maximum installed memory, then waits for a memory refresh cycle (16 ms or
more), reads the new data, and compares the result with the original data
pattern.