LE940B6 HW User Guide
Rev. 2.02
Page 80 of 111
2020-01-10
8.3.2.
I2C - Inter-integrated Circuit
The LE940B6 I2C is an alternate function of GPIO 1-15 pins. Available only from Modem
side as SW emulation of I2C on GPIO lines. Any GPIO can be configured as SCL or SDA.
LE940B6 supports I2C Master Mode only.
NOTE:
SW emulated I2C on GPIO lines is supported only from the modem side. For
more information, refer to Ref 1: LE940B6 AT Command Reference Guide
for command settings.
Ethernet Interface
The LE940B6 has an integrated Ethernet interface to an external Ethernet PHY
supporting 10M / 100M and 1G speed modes via a RGMII interface.
The Ethernet interface is target to be compliant with the RGMII and RMII specifications.
The supported RGMII and RMII specification versions are:
•
RGMII: Version 1.3, dated 12/10/2000, supporting up to 1000 Mbps operation
•
RMII: Version 1.2, dated 03/20/1998, supporting up to 100 Mbps operation
NOTE:
Make sure to design the Ethernet interface carefully depending on the PHY
chipset; contact Titan R&D for more details and guidelines.
Table 29: Ethernet Interface
PAD
Signal
I/O
Function
Type
Comment
G14
MAC_MDC
O
Management Data Clock
2.5/3.3V
G12
MAC_MDIO
I/O Management Data I/O
2.5/3.3V
V16
MAC_TXD[0]
O
RGMII or RMII TXD[0]
2.5/3.3V
T16
MAC_TXD[1]
O
RGMII or RMII TXD[1]
2.5/3.3V
R16
MAC_TXD[2]
O
RGMII TXD[2]
2.5/3.3V
N16
MAC_TXD[3]
O
RGMII TXD[3]
2.5/3.3V
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employees
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